53 lines
2.3 KiB
ArmAsm
53 lines
2.3 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=broadwell -instruction-tables < %s | FileCheck %s
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movbe %cx, (%rax)
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movbe (%rax), %cx
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movbe %ecx, (%rax)
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movbe (%rax), %ecx
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movbe %rcx, (%rax)
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movbe (%rax), %rcx
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# CHECK: Instruction Info:
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# CHECK-NEXT: [1]: #uOps
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# CHECK-NEXT: [2]: Latency
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# CHECK-NEXT: [3]: RThroughput
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# CHECK-NEXT: [4]: MayLoad
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# CHECK-NEXT: [5]: MayStore
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# CHECK-NEXT: [6]: HasSideEffects (U)
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# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
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# CHECK-NEXT: 3 2 1.00 * movbew %cx, (%rax)
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# CHECK-NEXT: 2 6 0.50 * movbew (%rax), %cx
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# CHECK-NEXT: 3 2 1.00 * movbel %ecx, (%rax)
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# CHECK-NEXT: 2 6 0.50 * movbel (%rax), %ecx
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# CHECK-NEXT: 3 2 1.00 * movbeq %rcx, (%rax)
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# CHECK-NEXT: 2 6 0.50 * movbeq (%rax), %rcx
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# CHECK: Resources:
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# CHECK-NEXT: [0] - BWDivider
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# CHECK-NEXT: [1] - BWFPDivider
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# CHECK-NEXT: [2] - BWPort0
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# CHECK-NEXT: [3] - BWPort1
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# CHECK-NEXT: [4] - BWPort2
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# CHECK-NEXT: [5] - BWPort3
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# CHECK-NEXT: [6] - BWPort4
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# CHECK-NEXT: [7] - BWPort5
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# CHECK-NEXT: [8] - BWPort6
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# CHECK-NEXT: [9] - BWPort7
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# CHECK: Resource pressure per iteration:
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# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9]
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# CHECK-NEXT: - - - 3.00 2.50 2.50 3.00 3.00 - 1.00
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# CHECK: Resource pressure by instruction:
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# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
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# CHECK-NEXT: - - - 0.50 0.33 0.33 1.00 0.50 - 0.33 movbew %cx, (%rax)
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# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - movbew (%rax), %cx
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# CHECK-NEXT: - - - 0.50 0.33 0.33 1.00 0.50 - 0.33 movbel %ecx, (%rax)
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# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - movbel (%rax), %ecx
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# CHECK-NEXT: - - - 0.50 0.33 0.33 1.00 0.50 - 0.33 movbeq %rcx, (%rax)
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# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - movbeq (%rax), %rcx
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