50 lines
1.9 KiB
ArmAsm
50 lines
1.9 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -resource-pressure=false -timeline < %s | FileCheck %s
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imul %rax, %rbx
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lzcnt %ax, %bx
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add %ecx, %ebx
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# CHECK: Iterations: 1
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# CHECK-NEXT: Instructions: 3
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# CHECK-NEXT: Total Cycles: 11
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# CHECK-NEXT: Total uOps: 4
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# CHECK: Dispatch Width: 4
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# CHECK-NEXT: uOps Per Cycle: 0.36
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# CHECK-NEXT: IPC: 0.27
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# CHECK-NEXT: Block RThroughput: 4.0
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# CHECK: Instruction Info:
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# CHECK-NEXT: [1]: #uOps
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# CHECK-NEXT: [2]: Latency
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# CHECK-NEXT: [3]: RThroughput
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# CHECK-NEXT: [4]: MayLoad
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# CHECK-NEXT: [5]: MayStore
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# CHECK-NEXT: [6]: HasSideEffects (U)
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# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
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# CHECK-NEXT: 1 6 4.00 imulq %rax, %rbx
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# CHECK-NEXT: 2 2 2.00 lzcntw %ax, %bx
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# CHECK-NEXT: 1 1 1.00 addl %ecx, %ebx
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# CHECK: Timeline view:
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# CHECK-NEXT: 0
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# CHECK-NEXT: Index 0123456789
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# CHECK: [0,0] DeeeeeeER . imulq %rax, %rbx
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# CHECK-NEXT: [0,1] D=====eeER. lzcntw %ax, %bx
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# CHECK-NEXT: [0,2] D=======eER addl %ecx, %ebx
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# CHECK: Average Wait times (based on the timeline view):
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# CHECK-NEXT: [0]: Executions
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# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
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# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
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# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
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# CHECK: [0] [1] [2] [3]
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# CHECK-NEXT: 0. 1 1.0 1.0 0.0 imulq %rax, %rbx
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# CHECK-NEXT: 1. 1 6.0 0.0 0.0 lzcntw %ax, %bx
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# CHECK-NEXT: 2. 1 8.0 0.0 0.0 addl %ecx, %ebx
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# CHECK-NEXT: 1 5.0 0.3 0.0 <total>
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