37 lines
1.6 KiB
ArmAsm
37 lines
1.6 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -resource-pressure=false -instruction-info=true < %s | FileCheck %s --check-prefix=ENABLED
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -resource-pressure=false -instruction-info=false < %s | FileCheck %s -check-prefix=DISABLED
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -resource-pressure=false -instruction-info < %s | FileCheck %s -check-prefix=ENABLED
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -resource-pressure=false < %s | FileCheck %s -check-prefix=ENABLED
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vmulps %xmm0, %xmm1, %xmm2
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vhaddps %xmm2, %xmm2, %xmm3
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vhaddps %xmm3, %xmm3, %xmm4
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# DISABLED-NOT: Instruction Info:
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# ENABLED: Iterations: 100
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# ENABLED-NEXT: Instructions: 300
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# ENABLED-NEXT: Total Cycles: 583
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# ENABLED-NEXT: Total uOps: 700
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# ENABLED: Dispatch Width: 4
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# ENABLED-NEXT: uOps Per Cycle: 1.20
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# ENABLED-NEXT: IPC: 0.51
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# ENABLED-NEXT: Block RThroughput: 5.5
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# ENABLED: Instruction Info:
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# ENABLED-NEXT: [1]: #uOps
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# ENABLED-NEXT: [2]: Latency
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# ENABLED-NEXT: [3]: RThroughput
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# ENABLED-NEXT: [4]: MayLoad
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# ENABLED-NEXT: [5]: MayStore
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# ENABLED-NEXT: [6]: HasSideEffects (U)
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# ENABLED: [1] [2] [3] [4] [5] [6] Instructions:
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# ENABLED-NEXT: 1 5 1.00 vmulps %xmm0, %xmm1, %xmm2
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# ENABLED-NEXT: 3 11 2.50 vhaddps %xmm2, %xmm2, %xmm3
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# ENABLED-NEXT: 3 11 2.50 vhaddps %xmm3, %xmm3, %xmm4
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