169 lines
5.1 KiB
LLVM
169 lines
5.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; If we zero-extend some value, and then immediately left-shift-out all the new
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; sign bits, and apply a mask to keep only the sign bit (which is the original
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; sign bit from before zero-extension), we might as well just sign-extend
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; and apply the same signmask.
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declare void @use32(i32)
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; Basic pattern
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define i32 @t0(i16 %x) {
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; CHECK-LABEL: @t0(
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; CHECK-NEXT: [[X_SIGNEXT:%.*]] = sext i16 [[X:%.*]] to i32
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; CHECK-NEXT: [[R:%.*]] = and i32 [[X_SIGNEXT]], -2147483648
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; CHECK-NEXT: ret i32 [[R]]
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;
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%i0 = zext i16 %x to i32
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%i1 = shl i32 %i0, 16
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%r = and i32 %i1, -2147483648
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ret i32 %r
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}
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define i32 @t1(i8 %x) {
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; CHECK-LABEL: @t1(
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; CHECK-NEXT: [[X_SIGNEXT:%.*]] = sext i8 [[X:%.*]] to i32
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; CHECK-NEXT: [[R:%.*]] = and i32 [[X_SIGNEXT]], -2147483648
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; CHECK-NEXT: ret i32 [[R]]
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;
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%i0 = zext i8 %x to i32
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%i1 = shl i32 %i0, 24
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%r = and i32 %i1, -2147483648
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ret i32 %r
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}
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; Some negative tests
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define i32 @n2(i16 %x) {
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; CHECK-LABEL: @n2(
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; CHECK-NEXT: ret i32 0
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;
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%i0 = zext i16 %x to i32
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%i1 = shl i32 %i0, 15 ; undershifting
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%r = and i32 %i1, -2147483648
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ret i32 %r
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}
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define i32 @n3(i16 %x) {
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; CHECK-LABEL: @n3(
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; CHECK-NEXT: [[I0:%.*]] = zext i16 [[X:%.*]] to i32
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; CHECK-NEXT: [[I1:%.*]] = shl i32 [[I0]], 17
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; CHECK-NEXT: [[R:%.*]] = and i32 [[I1]], -2147483648
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; CHECK-NEXT: ret i32 [[R]]
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;
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%i0 = zext i16 %x to i32
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%i1 = shl i32 %i0, 17 ; overshifting
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%r = and i32 %i1, -2147483648
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ret i32 %r
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}
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define i32 @n4(i16 %x) {
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; CHECK-LABEL: @n4(
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; CHECK-NEXT: [[I0:%.*]] = zext i16 [[X:%.*]] to i32
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; CHECK-NEXT: [[I1:%.*]] = shl nuw i32 [[I0]], 16
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; CHECK-NEXT: [[R:%.*]] = and i32 [[I1]], -1073741824
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; CHECK-NEXT: ret i32 [[R]]
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;
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%i0 = zext i16 %x to i32
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%i1 = shl i32 %i0, 16
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%r = and i32 %i1, 3221225472 ; not a sign bit
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ret i32 %r
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}
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; Extra-use tests
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define i32 @t5(i16 %x) {
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; CHECK-LABEL: @t5(
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; CHECK-NEXT: [[I0:%.*]] = zext i16 [[X:%.*]] to i32
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; CHECK-NEXT: call void @use32(i32 [[I0]])
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; CHECK-NEXT: [[X_SIGNEXT:%.*]] = sext i16 [[X]] to i32
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; CHECK-NEXT: [[R:%.*]] = and i32 [[X_SIGNEXT]], -2147483648
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; CHECK-NEXT: ret i32 [[R]]
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;
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%i0 = zext i16 %x to i32
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call void @use32(i32 %i0)
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%i1 = shl i32 %i0, 16
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%r = and i32 %i1, -2147483648
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ret i32 %r
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}
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define i32 @n6(i16 %x) {
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; CHECK-LABEL: @n6(
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; CHECK-NEXT: [[I0:%.*]] = zext i16 [[X:%.*]] to i32
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; CHECK-NEXT: [[I1:%.*]] = shl nuw i32 [[I0]], 16
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; CHECK-NEXT: call void @use32(i32 [[I1]])
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; CHECK-NEXT: [[R:%.*]] = and i32 [[I1]], -2147483648
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; CHECK-NEXT: ret i32 [[R]]
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;
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%i0 = zext i16 %x to i32
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%i1 = shl i32 %i0, 16 ; not one-use
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call void @use32(i32 %i1)
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%r = and i32 %i1, -2147483648
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ret i32 %r
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}
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define i32 @n7(i16 %x) {
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; CHECK-LABEL: @n7(
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; CHECK-NEXT: [[I0:%.*]] = zext i16 [[X:%.*]] to i32
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; CHECK-NEXT: call void @use32(i32 [[I0]])
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; CHECK-NEXT: [[I1:%.*]] = shl nuw i32 [[I0]], 16
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; CHECK-NEXT: call void @use32(i32 [[I1]])
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; CHECK-NEXT: [[R:%.*]] = and i32 [[I1]], -2147483648
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; CHECK-NEXT: ret i32 [[R]]
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;
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%i0 = zext i16 %x to i32 ; not one-use
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call void @use32(i32 %i0)
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%i1 = shl i32 %i0, 16 ; not one-use
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call void @use32(i32 %i1)
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%r = and i32 %i1, -2147483648
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ret i32 %r
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}
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; Some vector tests
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define <2 x i32> @t8(<2 x i16> %x) {
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; CHECK-LABEL: @t8(
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; CHECK-NEXT: [[X_SIGNEXT:%.*]] = sext <2 x i16> [[X:%.*]] to <2 x i32>
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; CHECK-NEXT: [[R:%.*]] = and <2 x i32> [[X_SIGNEXT]], <i32 -2147483648, i32 -2147483648>
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; CHECK-NEXT: ret <2 x i32> [[R]]
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;
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%i0 = zext <2 x i16> %x to <2 x i32>
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%i1 = shl <2 x i32> %i0, <i32 16, i32 16>
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%r = and <2 x i32> %i1, <i32 -2147483648, i32 -2147483648>
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ret <2 x i32> %r
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}
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define <2 x i32> @t9(<2 x i16> %x) {
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; CHECK-LABEL: @t9(
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; CHECK-NEXT: [[X_SIGNEXT:%.*]] = sext <2 x i16> [[X:%.*]] to <2 x i32>
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; CHECK-NEXT: [[R:%.*]] = and <2 x i32> [[X_SIGNEXT]], <i32 -2147483648, i32 undef>
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; CHECK-NEXT: ret <2 x i32> [[R]]
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;
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%i0 = zext <2 x i16> %x to <2 x i32>
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%i1 = shl <2 x i32> %i0, <i32 16, i32 undef>
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%r = and <2 x i32> %i1, <i32 -2147483648, i32 -2147483648>
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; Here undef can be propagated into the mask.
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ret <2 x i32> %r
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}
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define <2 x i32> @t10(<2 x i16> %x) {
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; CHECK-LABEL: @t10(
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; CHECK-NEXT: [[X_SIGNEXT:%.*]] = sext <2 x i16> [[X:%.*]] to <2 x i32>
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; CHECK-NEXT: [[R:%.*]] = and <2 x i32> [[X_SIGNEXT]], <i32 -2147483648, i32 0>
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; CHECK-NEXT: ret <2 x i32> [[R]]
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;
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%i0 = zext <2 x i16> %x to <2 x i32>
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%i1 = shl <2 x i32> %i0, <i32 16, i32 16>
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%r = and <2 x i32> %i1, <i32 -2147483648, i32 undef>
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; CAREFUL! We can't keep undef mask here, since high bits are no longer zero,
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; we must sanitize it to 0.
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ret <2 x i32> %r
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}
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define <2 x i32> @t11(<2 x i16> %x) {
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; CHECK-LABEL: @t11(
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; CHECK-NEXT: [[X_SIGNEXT:%.*]] = sext <2 x i16> [[X:%.*]] to <2 x i32>
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; CHECK-NEXT: [[R:%.*]] = and <2 x i32> [[X_SIGNEXT]], <i32 -2147483648, i32 undef>
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; CHECK-NEXT: ret <2 x i32> [[R]]
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;
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%i0 = zext <2 x i16> %x to <2 x i32>
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%i1 = shl <2 x i32> %i0, <i32 16, i32 undef>
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%r = and <2 x i32> %i1, <i32 -2147483648, i32 undef>
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; Here undef mask is fine.
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ret <2 x i32> %r
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}
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