llvm-for-llvmta/test/MachineVerifier/test_g_add.mir

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#RUN: not --crash llc -march=aarch64 -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target
---
name: test_add
legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
liveins:
body: |
bb.0:
%0:_(s32) = G_CONSTANT i32 0
%1:_(s32) = G_CONSTANT i32 1
; CHECK: Bad machine code: Too few operands
%2:_(s32) = G_ADD
; CHECK: Bad machine code: Too few operands
%3:_(s32) = G_ADD %0
%4:_(s32) = G_ADD %0, %1
; CHECK: Bad machine code: Too few operands
; CHECK: Bad machine code: Explicit definition marked as use
G_ADD %0, %1
; CHECK: Bad machine code: generic instruction must use register operands
%5:_(s32) = G_ADD %0, 1
%6:_(s64) = G_CONSTANT i64 0
; CHECK: Bad machine code: Type mismatch in generic instruction
; CHECK: Bad machine code: Generic virtual register does not allow subregister index
%8:_(s32) = G_ADD %6.sub_32:_(s64), %0
...