104 lines
3.4 KiB
LLVM
104 lines
3.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr8 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff -mcpu=pwr8 \
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; RUN: < %s -vec-extabi | FileCheck %s
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%class.PB2 = type { [1 x i32], %class.PB1* }
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%class.PB1 = type { [1 x i32], i64, i64, i32 }
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; Function Attrs: norecurse nounwind readonly
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define zeroext i1 @test1(%class.PB2* %s_a, %class.PB2* %s_b) local_unnamed_addr #0 {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lwz 3, 0(3)
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; CHECK-NEXT: lwz 4, 0(4)
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; CHECK-NEXT: rlwinm 3, 3, 0, 28, 28
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; CHECK-NEXT: rlwinm 4, 4, 0, 28, 28
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; CHECK-NEXT: sub 3, 3, 4
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; CHECK-NEXT: rldicl 3, 3, 1, 63
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; CHECK-NEXT: blr
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entry:
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%arrayidx.i6 = bitcast %class.PB2* %s_a to i32*
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%0 = load i32, i32* %arrayidx.i6, align 8, !tbaa !1
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%and.i = and i32 %0, 8
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%arrayidx.i37 = bitcast %class.PB2* %s_b to i32*
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%1 = load i32, i32* %arrayidx.i37, align 8, !tbaa !1
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%and.i4 = and i32 %1, 8
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%cmp.i5 = icmp ult i32 %and.i, %and.i4
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ret i1 %cmp.i5
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}
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; Function Attrs: norecurse nounwind readonly
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define zeroext i1 @test2(%class.PB2* %s_a, %class.PB2* %s_b) local_unnamed_addr #0 {
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lwz 3, 0(3)
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; CHECK-NEXT: lwz 4, 0(4)
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; CHECK-NEXT: rlwinm 3, 3, 0, 28, 28
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; CHECK-NEXT: rlwinm 4, 4, 0, 28, 28
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; CHECK-NEXT: sub 3, 4, 3
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; CHECK-NEXT: not 3, 3
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; CHECK-NEXT: rldicl 3, 3, 1, 63
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; CHECK-NEXT: blr
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entry:
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%arrayidx.i6 = bitcast %class.PB2* %s_a to i32*
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%0 = load i32, i32* %arrayidx.i6, align 8, !tbaa !1
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%and.i = and i32 %0, 8
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%arrayidx.i37 = bitcast %class.PB2* %s_b to i32*
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%1 = load i32, i32* %arrayidx.i37, align 8, !tbaa !1
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%and.i4 = and i32 %1, 8
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%cmp.i5 = icmp ule i32 %and.i, %and.i4
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ret i1 %cmp.i5
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}
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; Function Attrs: norecurse nounwind readonly
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define zeroext i1 @test3(%class.PB2* %s_a, %class.PB2* %s_b) local_unnamed_addr #0 {
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; CHECK-LABEL: test3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lwz 3, 0(3)
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; CHECK-NEXT: lwz 4, 0(4)
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; CHECK-NEXT: rlwinm 3, 3, 0, 28, 28
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; CHECK-NEXT: rlwinm 4, 4, 0, 28, 28
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; CHECK-NEXT: sub 3, 4, 3
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; CHECK-NEXT: rldicl 3, 3, 1, 63
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; CHECK-NEXT: blr
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entry:
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%arrayidx.i6 = bitcast %class.PB2* %s_a to i32*
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%0 = load i32, i32* %arrayidx.i6, align 8, !tbaa !1
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%and.i = and i32 %0, 8
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%arrayidx.i37 = bitcast %class.PB2* %s_b to i32*
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%1 = load i32, i32* %arrayidx.i37, align 8, !tbaa !1
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%and.i4 = and i32 %1, 8
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%cmp.i5 = icmp ugt i32 %and.i, %and.i4
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ret i1 %cmp.i5
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}
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; Function Attrs: norecurse nounwind readonly
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define zeroext i1 @test4(%class.PB2* %s_a, %class.PB2* %s_b) local_unnamed_addr #0 {
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; CHECK-LABEL: test4:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lwz 3, 0(3)
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; CHECK-NEXT: lwz 4, 0(4)
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; CHECK-NEXT: rlwinm 3, 3, 0, 28, 28
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; CHECK-NEXT: rlwinm 4, 4, 0, 28, 28
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; CHECK-NEXT: sub 3, 3, 4
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; CHECK-NEXT: not 3, 3
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; CHECK-NEXT: rldicl 3, 3, 1, 63
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; CHECK-NEXT: blr
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entry:
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%arrayidx.i6 = bitcast %class.PB2* %s_a to i32*
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%0 = load i32, i32* %arrayidx.i6, align 8, !tbaa !1
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%and.i = and i32 %0, 8
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%arrayidx.i37 = bitcast %class.PB2* %s_b to i32*
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%1 = load i32, i32* %arrayidx.i37, align 8, !tbaa !1
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%and.i4 = and i32 %1, 8
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%cmp.i5 = icmp uge i32 %and.i, %and.i4
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ret i1 %cmp.i5
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}
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!1 = !{!2, !2, i64 0}
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!2 = !{!"int", !3, i64 0}
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!3 = !{!"omnipotent char", !4, i64 0}
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!4 = !{!"Simple C++ TBAA"}
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