12 lines
712 B
LLVM
12 lines
712 B
LLVM
; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64--
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define void @__divtc3({ ppc_fp128, ppc_fp128 }* noalias sret({ ppc_fp128, ppc_fp128 }) %agg.result, ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind {
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entry:
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%imag59 = load ppc_fp128, ppc_fp128* null, align 8 ; <ppc_fp128> [#uses=1]
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%0 = fmul ppc_fp128 0xM00000000000000000000000000000000, %imag59 ; <ppc_fp128> [#uses=1]
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%1 = fmul ppc_fp128 0xM00000000000000000000000000000000, 0xM00000000000000000000000000000000 ; <ppc_fp128> [#uses=1]
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%2 = fadd ppc_fp128 %0, %1 ; <ppc_fp128> [#uses=1]
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store ppc_fp128 %2, ppc_fp128* null, align 16
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unreachable
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}
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