llvm-for-llvmta/test/CodeGen/Mips/GlobalISel/regbankselect/bswap.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=mipsel-linux-gnu -run-pass=regbankselect -mattr=+mips32r2 -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32R2
--- |
define void @bswap_i32() { entry: ret void }
...
---
name: bswap_i32
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; MIPS32R2-LABEL: name: bswap_i32
; MIPS32R2: liveins: $a0
; MIPS32R2: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
; MIPS32R2: [[BSWAP:%[0-9]+]]:gprb(s32) = G_BSWAP [[COPY]]
; MIPS32R2: $v0 = COPY [[BSWAP]](s32)
; MIPS32R2: RetRA implicit $v0
%0:_(s32) = COPY $a0
%1:_(s32) = G_BSWAP %0
$v0 = COPY %1(s32)
RetRA implicit $v0
...