61 lines
2.0 KiB
YAML
61 lines
2.0 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=mipsel-linux-gnu -mcpu=mips32r5 -mattr=+msa,+fp64,+nan2008 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=P5600
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--- |
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define void @sqrt_v4f32(<4 x float>* %a, <4 x float>* %c) { entry: ret void }
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define void @sqrt_v2f64(<2 x double>* %a, <2 x double>* %c) { entry: ret void }
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...
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---
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name: sqrt_v4f32
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; P5600-LABEL: name: sqrt_v4f32
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; P5600: liveins: $a0, $a1
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; P5600: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; P5600: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; P5600: [[LD_W:%[0-9]+]]:msa128w = LD_W [[COPY]], 0 :: (load 16 from %ir.a)
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; P5600: [[FSQRT_W:%[0-9]+]]:msa128w = FSQRT_W [[LD_W]]
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; P5600: ST_W [[FSQRT_W]], [[COPY1]], 0 :: (store 16 into %ir.c)
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; P5600: RetRA
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%0:gprb(p0) = COPY $a0
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%1:gprb(p0) = COPY $a1
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%2:fprb(<4 x s32>) = G_LOAD %0(p0) :: (load 16 from %ir.a)
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%3:fprb(<4 x s32>) = G_FSQRT %2
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G_STORE %3(<4 x s32>), %1(p0) :: (store 16 into %ir.c)
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RetRA
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...
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---
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name: sqrt_v2f64
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; P5600-LABEL: name: sqrt_v2f64
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; P5600: liveins: $a0, $a1
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; P5600: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; P5600: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; P5600: [[LD_D:%[0-9]+]]:msa128d = LD_D [[COPY]], 0 :: (load 16 from %ir.a)
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; P5600: [[FSQRT_D:%[0-9]+]]:msa128d = FSQRT_D [[LD_D]]
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; P5600: ST_D [[FSQRT_D]], [[COPY1]], 0 :: (store 16 into %ir.c)
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; P5600: RetRA
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%0:gprb(p0) = COPY $a0
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%1:gprb(p0) = COPY $a1
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%2:fprb(<2 x s64>) = G_LOAD %0(p0) :: (load 16 from %ir.a)
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%3:fprb(<2 x s64>) = G_FSQRT %2
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G_STORE %3(<2 x s64>), %1(p0) :: (store 16 into %ir.c)
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RetRA
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...
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