llvm-for-llvmta/test/CodeGen/Hexagon/isel-splat-vector-neg-i8.ll

17 lines
490 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -march=hexagon < %s | FileCheck %s
define <4 x i8> @fred() #0 {
; CHECK-LABEL: fred:
; CHECK: // %bb.0:
; CHECK-NEXT: {
; CHECK-NEXT: r0 = ##-16843010
; CHECK-NEXT: jumpr r31
; CHECK-NEXT: }
%v0 = insertelement <4 x i8> undef, i8 -2, i32 0
%v1 = shufflevector <4 x i8> %v0, <4 x i8> undef, <4 x i32> zeroinitializer
ret <4 x i8> %v1
}
attributes #0 = { nounwind readnone }