llvm-for-llvmta/test/CodeGen/AMDGPU/GlobalISel/regbankselect-block-addr.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -march amdgcn -mcpu=fiji -run-pass=regbankselect %s -o - | FileCheck %s
--- |
@addr = global i8* null
define void @test_blockaddress() {
store i8* blockaddress(@test_blockaddress, %block), i8** @addr
indirectbr i8* blockaddress(@test_blockaddress, %block), [label %block]
block: ; preds = %0
ret void
}
...
---
name: test_blockaddress
alignment: 16
legalized: true
body: |
bb.1 (%ir-block.0):
; CHECK-LABEL: name: test_blockaddress
; CHECK: [[BLOCK_ADDR:%[0-9]+]]:sgpr(p0) = G_BLOCK_ADDR blockaddress(@test_blockaddress, %ir-block.block)
; CHECK: S_ENDPGM 0, implicit [[BLOCK_ADDR]](p0)
%0:_(p0) = G_BLOCK_ADDR blockaddress(@test_blockaddress, %ir-block.block)
S_ENDPGM 0, implicit %0
...