148 lines
5.0 KiB
YAML
148 lines
5.0 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple aarch64 -run-pass=aarch64-postlegalizer-lowering -verify-machineinstrs %s -o - | FileCheck %s
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...
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---
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name: ashr_v4s32
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alignment: 4
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $d0, $d1
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; CHECK-LABEL: name: ashr_v4s32
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; CHECK: liveins: $d0, $d1
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; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
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; CHECK: [[VASHR:%[0-9]+]]:_(<4 x s32>) = G_VASHR [[COPY]], [[C]](s32)
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; CHECK: $q0 = COPY [[VASHR]](<4 x s32>)
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; CHECK: RET_ReallyLR implicit $q0
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%0:_(<4 x s32>) = COPY $q0
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%1:_(s32) = G_CONSTANT i32 5
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%2:_(<4 x s32>) = G_BUILD_VECTOR %1(s32), %1(s32), %1(s32), %1(s32)
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%3:_(<4 x s32>) = G_ASHR %0, %2(<4 x s32>)
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$q0 = COPY %3(<4 x s32>)
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RET_ReallyLR implicit $q0
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...
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---
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name: lshr_v4s32
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alignment: 4
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $d0, $d1
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; CHECK-LABEL: name: lshr_v4s32
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; CHECK: liveins: $d0, $d1
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; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
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; CHECK: [[VLSHR:%[0-9]+]]:_(<4 x s32>) = G_VLSHR [[COPY]], [[C]](s32)
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; CHECK: $q0 = COPY [[VLSHR]](<4 x s32>)
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; CHECK: RET_ReallyLR implicit $q0
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%0:_(<4 x s32>) = COPY $q0
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%1:_(s32) = G_CONSTANT i32 5
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%2:_(<4 x s32>) = G_BUILD_VECTOR %1(s32), %1(s32), %1(s32), %1(s32)
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%3:_(<4 x s32>) = G_LSHR %0, %2(<4 x s32>)
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$q0 = COPY %3(<4 x s32>)
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RET_ReallyLR implicit $q0
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...
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---
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name: lshr_v8s16
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alignment: 4
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $d0, $d1
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; CHECK-LABEL: name: lshr_v8s16
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; CHECK: liveins: $d0, $d1
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; CHECK: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
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; CHECK: [[VLSHR:%[0-9]+]]:_(<8 x s16>) = G_VLSHR [[COPY]], [[C]](s32)
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; CHECK: $q0 = COPY [[VLSHR]](<8 x s16>)
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; CHECK: RET_ReallyLR implicit $q0
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%0:_(<8 x s16>) = COPY $q0
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%1:_(s16) = G_CONSTANT i16 5
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%2:_(<8 x s16>) = G_BUILD_VECTOR %1(s16), %1(s16), %1(s16), %1(s16), %1(s16), %1(s16), %1(s16), %1(s16)
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%3:_(<8 x s16>) = G_LSHR %0, %2(<8 x s16>)
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$q0 = COPY %3(<8 x s16>)
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RET_ReallyLR implicit $q0
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...
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---
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name: imm_too_large
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alignment: 4
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $d0, $d1
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; CHECK-LABEL: name: imm_too_large
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; CHECK: liveins: $d0, $d1
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; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 40
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; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
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; CHECK: [[LSHR:%[0-9]+]]:_(<4 x s32>) = G_LSHR [[COPY]], [[BUILD_VECTOR]](<4 x s32>)
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; CHECK: $q0 = COPY [[LSHR]](<4 x s32>)
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; CHECK: RET_ReallyLR implicit $q0
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%0:_(<4 x s32>) = COPY $q0
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%1:_(s32) = G_CONSTANT i32 40
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%2:_(<4 x s32>) = G_BUILD_VECTOR %1(s32), %1(s32), %1(s32), %1(s32)
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%3:_(<4 x s32>) = G_LSHR %0, %2(<4 x s32>)
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$q0 = COPY %3(<4 x s32>)
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RET_ReallyLR implicit $q0
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...
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---
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name: imm_zero
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alignment: 4
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $d0, $d1
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; CHECK-LABEL: name: imm_zero
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; CHECK: liveins: $d0, $d1
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; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
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; CHECK: [[LSHR:%[0-9]+]]:_(<4 x s32>) = G_LSHR [[COPY]], [[BUILD_VECTOR]](<4 x s32>)
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; CHECK: $q0 = COPY [[LSHR]](<4 x s32>)
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; CHECK: RET_ReallyLR implicit $q0
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%0:_(<4 x s32>) = COPY $q0
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%1:_(s32) = G_CONSTANT i32 0
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%2:_(<4 x s32>) = G_BUILD_VECTOR %1(s32), %1(s32), %1(s32), %1(s32)
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%3:_(<4 x s32>) = G_LSHR %0, %2(<4 x s32>)
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$q0 = COPY %3(<4 x s32>)
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RET_ReallyLR implicit $q0
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...
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---
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name: imm_not_splat
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alignment: 4
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $d0, $d1
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; CHECK-LABEL: name: imm_not_splat
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; CHECK: liveins: $d0, $d1
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; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 6
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; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C1]](s32), [[C]](s32), [[C]](s32)
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; CHECK: [[LSHR:%[0-9]+]]:_(<4 x s32>) = G_LSHR [[COPY]], [[BUILD_VECTOR]](<4 x s32>)
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; CHECK: $q0 = COPY [[LSHR]](<4 x s32>)
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; CHECK: RET_ReallyLR implicit $q0
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%0:_(<4 x s32>) = COPY $q0
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%1:_(s32) = G_CONSTANT i32 4
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%4:_(s32) = G_CONSTANT i32 6
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%2:_(<4 x s32>) = G_BUILD_VECTOR %1(s32), %4(s32), %1(s32), %1(s32)
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%3:_(<4 x s32>) = G_LSHR %0, %2(<4 x s32>)
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$q0 = COPY %3(<4 x s32>)
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RET_ReallyLR implicit $q0
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...
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