50 lines
2.0 KiB
YAML
50 lines
2.0 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=aarch64 -run-pass=legalizer %s -o - -verify-machineinstrs | FileCheck %s
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--- |
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64"
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define i32 @load_store_test(i24* %ptr, i24* %ptr2) {
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%val = load i24, i24* %ptr
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store i24 %val, i24* %ptr2
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ret i32 0
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}
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...
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---
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name: load_store_test
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.1 (%ir-block.0):
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liveins: $x0, $x1
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; CHECK-LABEL: name: load_store_test
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; CHECK: liveins: $x0, $x1
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load 2 from %ir.ptr, align 4)
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
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; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](s64)
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; CHECK: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p0) :: (load 1 from %ir.ptr + 2, align 2, basealign 4)
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; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
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; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LOAD]], [[C2]](s64)
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; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[SHL]], [[ZEXTLOAD]]
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
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; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY2]], [[C2]](s64)
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; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C1]](s64)
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; CHECK: G_STORE [[COPY2]](s32), [[COPY1]](p0) :: (store 2 into %ir.ptr2, align 4)
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; CHECK: G_STORE [[LSHR]](s32), [[PTR_ADD1]](p0) :: (store 1 into %ir.ptr2 + 2, align 2, basealign 4)
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; CHECK: $w0 = COPY [[C]](s32)
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; CHECK: RET_ReallyLR implicit $w0
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%0:_(p0) = COPY $x0
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%1:_(p0) = COPY $x1
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%3:_(s32) = G_CONSTANT i32 0
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%2:_(s24) = G_LOAD %0(p0) :: (load 3 from %ir.ptr, align 4)
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G_STORE %2(s24), %1(p0) :: (store 3 into %ir.ptr2, align 4)
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$w0 = COPY %3(s32)
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RET_ReallyLR implicit $w0
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...
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