87 lines
3.0 KiB
YAML
87 lines
3.0 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=aarch64 -run-pass=aarch64-prelegalizer-combiner -O0 -verify-machineinstrs %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "arm64-apple-darwin"
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1 immarg) #1
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define void @test_small_memcpy(i32* nocapture %dst, i32* nocapture readonly %src) {
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entry:
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%0 = bitcast i32* %dst to i8*
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%1 = bitcast i32* %src to i8*
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 %1, i64 32, i1 false)
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ret void
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}
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define void @test_large_memcpy(i32* nocapture %dst, i32* nocapture readonly %src) {
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entry:
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%0 = bitcast i32* %dst to i8*
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%1 = bitcast i32* %src to i8*
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 %1, i64 36, i1 false)
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ret void
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}
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attributes #1 = { argmemonly nounwind }
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...
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---
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name: test_small_memcpy
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alignment: 4
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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machineFunctionInfo: {}
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body: |
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bb.1.entry:
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liveins: $x0, $x1
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; CHECK-LABEL: name: test_small_memcpy
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; CHECK: liveins: $x0, $x1
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
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; CHECK: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY1]](p0) :: (load 16 from %ir.1, align 4)
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; CHECK: G_STORE [[LOAD]](s128), [[COPY]](p0) :: (store 16 into %ir.0, align 4)
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
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; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C]](s64)
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; CHECK: [[LOAD1:%[0-9]+]]:_(s128) = G_LOAD [[GEP]](p0) :: (load 16 from %ir.1 + 16, align 4)
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; CHECK: [[GEP1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
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; CHECK: G_STORE [[LOAD1]](s128), [[GEP1]](p0) :: (store 16 into %ir.0 + 16, align 4)
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; CHECK: RET_ReallyLR
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%0:_(p0) = COPY $x0
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%1:_(p0) = COPY $x1
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%2:_(s64) = G_CONSTANT i64 32
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G_MEMCPY %0(p0), %1(p0), %2(s64), 1 :: (store 1 into %ir.0, align 4), (load 1 from %ir.1, align 4)
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RET_ReallyLR
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...
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---
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name: test_large_memcpy
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alignment: 4
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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machineFunctionInfo: {}
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body: |
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bb.1.entry:
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liveins: $x0, $x1
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; CHECK-LABEL: name: test_large_memcpy
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; CHECK: liveins: $x0, $x1
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 36
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; CHECK: G_MEMCPY [[COPY]](p0), [[COPY1]](p0), [[C]](s64), 1 :: (store 1 into %ir.0, align 4), (load 1 from %ir.1, align 4)
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; CHECK: RET_ReallyLR
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%0:_(p0) = COPY $x0
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%1:_(p0) = COPY $x1
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%2:_(s64) = G_CONSTANT i64 36
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G_MEMCPY %0(p0), %1(p0), %2(s64), 1 :: (store 1 into %ir.0, align 4), (load 1 from %ir.1, align 4)
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RET_ReallyLR
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...
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