462 lines
15 KiB
C++
462 lines
15 KiB
C++
//===-- X86WinCOFFTargetStreamer.cpp ----------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "X86MCTargetDesc.h"
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#include "X86TargetStreamer.h"
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#include "llvm/DebugInfo/CodeView/CodeView.h"
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#include "llvm/MC/MCCodeView.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCInstPrinter.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/FormattedStream.h"
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using namespace llvm;
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using namespace llvm::codeview;
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namespace {
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/// Implements Windows x86-only directives for assembly emission.
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class X86WinCOFFAsmTargetStreamer : public X86TargetStreamer {
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formatted_raw_ostream &OS;
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MCInstPrinter &InstPrinter;
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public:
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X86WinCOFFAsmTargetStreamer(MCStreamer &S, formatted_raw_ostream &OS,
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MCInstPrinter &InstPrinter)
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: X86TargetStreamer(S), OS(OS), InstPrinter(InstPrinter) {}
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bool emitFPOProc(const MCSymbol *ProcSym, unsigned ParamsSize,
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SMLoc L) override;
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bool emitFPOEndPrologue(SMLoc L) override;
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bool emitFPOEndProc(SMLoc L) override;
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bool emitFPOData(const MCSymbol *ProcSym, SMLoc L) override;
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bool emitFPOPushReg(unsigned Reg, SMLoc L) override;
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bool emitFPOStackAlloc(unsigned StackAlloc, SMLoc L) override;
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bool emitFPOStackAlign(unsigned Align, SMLoc L) override;
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bool emitFPOSetFrame(unsigned Reg, SMLoc L) override;
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};
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/// Represents a single FPO directive.
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struct FPOInstruction {
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MCSymbol *Label;
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enum Operation {
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PushReg,
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StackAlloc,
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StackAlign,
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SetFrame,
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} Op;
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unsigned RegOrOffset;
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};
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struct FPOData {
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const MCSymbol *Function = nullptr;
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MCSymbol *Begin = nullptr;
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MCSymbol *PrologueEnd = nullptr;
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MCSymbol *End = nullptr;
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unsigned ParamsSize = 0;
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SmallVector<FPOInstruction, 5> Instructions;
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};
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/// Implements Windows x86-only directives for object emission.
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class X86WinCOFFTargetStreamer : public X86TargetStreamer {
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/// Map from function symbol to its FPO data.
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DenseMap<const MCSymbol *, std::unique_ptr<FPOData>> AllFPOData;
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/// Current FPO data created by .cv_fpo_proc.
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std::unique_ptr<FPOData> CurFPOData;
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bool haveOpenFPOData() { return !!CurFPOData; }
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/// Diagnoses an error at L if we are not in an FPO prologue. Return true on
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/// error.
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bool checkInFPOPrologue(SMLoc L);
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MCSymbol *emitFPOLabel();
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MCContext &getContext() { return getStreamer().getContext(); }
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public:
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X86WinCOFFTargetStreamer(MCStreamer &S) : X86TargetStreamer(S) {}
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bool emitFPOProc(const MCSymbol *ProcSym, unsigned ParamsSize,
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SMLoc L) override;
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bool emitFPOEndPrologue(SMLoc L) override;
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bool emitFPOEndProc(SMLoc L) override;
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bool emitFPOData(const MCSymbol *ProcSym, SMLoc L) override;
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bool emitFPOPushReg(unsigned Reg, SMLoc L) override;
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bool emitFPOStackAlloc(unsigned StackAlloc, SMLoc L) override;
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bool emitFPOStackAlign(unsigned Align, SMLoc L) override;
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bool emitFPOSetFrame(unsigned Reg, SMLoc L) override;
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};
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} // end namespace
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bool X86WinCOFFAsmTargetStreamer::emitFPOProc(const MCSymbol *ProcSym,
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unsigned ParamsSize, SMLoc L) {
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OS << "\t.cv_fpo_proc\t";
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ProcSym->print(OS, getStreamer().getContext().getAsmInfo());
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OS << ' ' << ParamsSize << '\n';
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return false;
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}
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bool X86WinCOFFAsmTargetStreamer::emitFPOEndPrologue(SMLoc L) {
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OS << "\t.cv_fpo_endprologue\n";
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return false;
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}
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bool X86WinCOFFAsmTargetStreamer::emitFPOEndProc(SMLoc L) {
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OS << "\t.cv_fpo_endproc\n";
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return false;
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}
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bool X86WinCOFFAsmTargetStreamer::emitFPOData(const MCSymbol *ProcSym,
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SMLoc L) {
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OS << "\t.cv_fpo_data\t";
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ProcSym->print(OS, getStreamer().getContext().getAsmInfo());
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OS << '\n';
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return false;
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}
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bool X86WinCOFFAsmTargetStreamer::emitFPOPushReg(unsigned Reg, SMLoc L) {
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OS << "\t.cv_fpo_pushreg\t";
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InstPrinter.printRegName(OS, Reg);
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OS << '\n';
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return false;
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}
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bool X86WinCOFFAsmTargetStreamer::emitFPOStackAlloc(unsigned StackAlloc,
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SMLoc L) {
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OS << "\t.cv_fpo_stackalloc\t" << StackAlloc << '\n';
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return false;
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}
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bool X86WinCOFFAsmTargetStreamer::emitFPOStackAlign(unsigned Align, SMLoc L) {
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OS << "\t.cv_fpo_stackalign\t" << Align << '\n';
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return false;
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}
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bool X86WinCOFFAsmTargetStreamer::emitFPOSetFrame(unsigned Reg, SMLoc L) {
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OS << "\t.cv_fpo_setframe\t";
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InstPrinter.printRegName(OS, Reg);
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OS << '\n';
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return false;
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}
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bool X86WinCOFFTargetStreamer::checkInFPOPrologue(SMLoc L) {
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if (!haveOpenFPOData() || CurFPOData->PrologueEnd) {
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getContext().reportError(
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L,
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"directive must appear between .cv_fpo_proc and .cv_fpo_endprologue");
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return true;
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}
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return false;
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}
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MCSymbol *X86WinCOFFTargetStreamer::emitFPOLabel() {
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MCSymbol *Label = getContext().createTempSymbol("cfi", true);
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getStreamer().emitLabel(Label);
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return Label;
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}
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bool X86WinCOFFTargetStreamer::emitFPOProc(const MCSymbol *ProcSym,
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unsigned ParamsSize, SMLoc L) {
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if (haveOpenFPOData()) {
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getContext().reportError(
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L, "opening new .cv_fpo_proc before closing previous frame");
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return true;
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}
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CurFPOData = std::make_unique<FPOData>();
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CurFPOData->Function = ProcSym;
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CurFPOData->Begin = emitFPOLabel();
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CurFPOData->ParamsSize = ParamsSize;
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return false;
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}
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bool X86WinCOFFTargetStreamer::emitFPOEndProc(SMLoc L) {
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if (!haveOpenFPOData()) {
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getContext().reportError(L, ".cv_fpo_endproc must appear after .cv_proc");
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return true;
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}
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if (!CurFPOData->PrologueEnd) {
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// Complain if there were prologue setup instructions but no end prologue.
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if (!CurFPOData->Instructions.empty()) {
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getContext().reportError(L, "missing .cv_fpo_endprologue");
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CurFPOData->Instructions.clear();
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}
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// Claim there is a zero-length prologue to make the label math work out
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// later.
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CurFPOData->PrologueEnd = CurFPOData->Begin;
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}
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CurFPOData->End = emitFPOLabel();
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const MCSymbol *Fn = CurFPOData->Function;
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AllFPOData.insert({Fn, std::move(CurFPOData)});
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return false;
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}
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bool X86WinCOFFTargetStreamer::emitFPOSetFrame(unsigned Reg, SMLoc L) {
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if (checkInFPOPrologue(L))
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return true;
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FPOInstruction Inst;
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Inst.Label = emitFPOLabel();
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Inst.Op = FPOInstruction::SetFrame;
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Inst.RegOrOffset = Reg;
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CurFPOData->Instructions.push_back(Inst);
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return false;
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}
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bool X86WinCOFFTargetStreamer::emitFPOPushReg(unsigned Reg, SMLoc L) {
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if (checkInFPOPrologue(L))
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return true;
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FPOInstruction Inst;
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Inst.Label = emitFPOLabel();
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Inst.Op = FPOInstruction::PushReg;
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Inst.RegOrOffset = Reg;
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CurFPOData->Instructions.push_back(Inst);
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return false;
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}
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bool X86WinCOFFTargetStreamer::emitFPOStackAlloc(unsigned StackAlloc, SMLoc L) {
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if (checkInFPOPrologue(L))
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return true;
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FPOInstruction Inst;
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Inst.Label = emitFPOLabel();
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Inst.Op = FPOInstruction::StackAlloc;
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Inst.RegOrOffset = StackAlloc;
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CurFPOData->Instructions.push_back(Inst);
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return false;
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}
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bool X86WinCOFFTargetStreamer::emitFPOStackAlign(unsigned Align, SMLoc L) {
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if (checkInFPOPrologue(L))
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return true;
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if (!llvm::any_of(CurFPOData->Instructions, [](const FPOInstruction &Inst) {
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return Inst.Op == FPOInstruction::SetFrame;
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})) {
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getContext().reportError(
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L, "a frame register must be established before aligning the stack");
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return true;
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}
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FPOInstruction Inst;
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Inst.Label = emitFPOLabel();
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Inst.Op = FPOInstruction::StackAlign;
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Inst.RegOrOffset = Align;
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CurFPOData->Instructions.push_back(Inst);
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return false;
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}
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bool X86WinCOFFTargetStreamer::emitFPOEndPrologue(SMLoc L) {
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if (checkInFPOPrologue(L))
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return true;
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CurFPOData->PrologueEnd = emitFPOLabel();
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return false;
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}
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namespace {
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struct RegSaveOffset {
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RegSaveOffset(unsigned Reg, unsigned Offset) : Reg(Reg), Offset(Offset) {}
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unsigned Reg = 0;
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unsigned Offset = 0;
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};
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struct FPOStateMachine {
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explicit FPOStateMachine(const FPOData *FPO) : FPO(FPO) {}
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const FPOData *FPO = nullptr;
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unsigned FrameReg = 0;
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unsigned FrameRegOff = 0;
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unsigned CurOffset = 0;
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unsigned LocalSize = 0;
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unsigned SavedRegSize = 0;
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unsigned StackOffsetBeforeAlign = 0;
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unsigned StackAlign = 0;
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unsigned Flags = 0; // FIXME: Set HasSEH / HasEH.
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SmallString<128> FrameFunc;
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SmallVector<RegSaveOffset, 4> RegSaveOffsets;
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void emitFrameDataRecord(MCStreamer &OS, MCSymbol *Label);
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};
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} // end namespace
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static Printable printFPOReg(const MCRegisterInfo *MRI, unsigned LLVMReg) {
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return Printable([MRI, LLVMReg](raw_ostream &OS) {
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switch (LLVMReg) {
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// MSVC only seems to emit symbolic register names for EIP, EBP, and ESP,
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// but the format seems to support more than that, so we emit them.
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case X86::EAX: OS << "$eax"; break;
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case X86::EBX: OS << "$ebx"; break;
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case X86::ECX: OS << "$ecx"; break;
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case X86::EDX: OS << "$edx"; break;
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case X86::EDI: OS << "$edi"; break;
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case X86::ESI: OS << "$esi"; break;
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case X86::ESP: OS << "$esp"; break;
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case X86::EBP: OS << "$ebp"; break;
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case X86::EIP: OS << "$eip"; break;
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// Otherwise, get the codeview register number and print $N.
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default:
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OS << '$' << MRI->getCodeViewRegNum(LLVMReg);
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break;
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}
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});
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}
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void FPOStateMachine::emitFrameDataRecord(MCStreamer &OS, MCSymbol *Label) {
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unsigned CurFlags = Flags;
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if (Label == FPO->Begin)
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CurFlags |= FrameData::IsFunctionStart;
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// Compute the new FrameFunc string.
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FrameFunc.clear();
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raw_svector_ostream FuncOS(FrameFunc);
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const MCRegisterInfo *MRI = OS.getContext().getRegisterInfo();
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assert((StackAlign == 0 || FrameReg != 0) &&
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"cannot align stack without frame reg");
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StringRef CFAVar = StackAlign == 0 ? "$T0" : "$T1";
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if (FrameReg) {
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// CFA is FrameReg + FrameRegOff.
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FuncOS << CFAVar << ' ' << printFPOReg(MRI, FrameReg) << ' ' << FrameRegOff
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<< " + = ";
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// Assign $T0, the VFRAME register, the value of ESP after it is aligned.
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// Starting from the CFA, we subtract the size of all pushed registers, and
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// align the result. While we don't store any CSRs in this area, $T0 is used
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// by S_DEFRANGE_FRAMEPOINTER_REL records to find local variables.
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if (StackAlign) {
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FuncOS << "$T0 " << CFAVar << ' ' << StackOffsetBeforeAlign << " - "
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<< StackAlign << " @ = ";
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}
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} else {
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// The address of return address is ESP + CurOffset, but we use .raSearch to
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// match MSVC. This seems to ask the debugger to subtract some combination
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// of LocalSize and SavedRegSize from ESP and grovel around in that memory
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// to find the address of a plausible return address.
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FuncOS << CFAVar << " .raSearch = ";
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}
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// Caller's $eip should be dereferenced CFA, and $esp should be CFA plus 4.
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FuncOS << "$eip " << CFAVar << " ^ = ";
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FuncOS << "$esp " << CFAVar << " 4 + = ";
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// Each saved register is stored at an unchanging negative CFA offset.
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for (RegSaveOffset RO : RegSaveOffsets)
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FuncOS << printFPOReg(MRI, RO.Reg) << ' ' << CFAVar << ' ' << RO.Offset
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<< " - ^ = ";
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// Add it to the CV string table.
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CodeViewContext &CVCtx = OS.getContext().getCVContext();
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unsigned FrameFuncStrTabOff = CVCtx.addToStringTable(FuncOS.str()).second;
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// MSVC has only ever been observed to emit a MaxStackSize of zero.
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unsigned MaxStackSize = 0;
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// The FrameData record format is:
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// ulittle32_t RvaStart;
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// ulittle32_t CodeSize;
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// ulittle32_t LocalSize;
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// ulittle32_t ParamsSize;
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// ulittle32_t MaxStackSize;
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// ulittle32_t FrameFunc; // String table offset
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// ulittle16_t PrologSize;
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// ulittle16_t SavedRegsSize;
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// ulittle32_t Flags;
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OS.emitAbsoluteSymbolDiff(Label, FPO->Begin, 4); // RvaStart
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OS.emitAbsoluteSymbolDiff(FPO->End, Label, 4); // CodeSize
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OS.emitInt32(LocalSize);
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OS.emitInt32(FPO->ParamsSize);
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OS.emitInt32(MaxStackSize);
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OS.emitInt32(FrameFuncStrTabOff); // FrameFunc
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OS.emitAbsoluteSymbolDiff(FPO->PrologueEnd, Label, 2);
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OS.emitInt16(SavedRegSize);
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OS.emitInt32(CurFlags);
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}
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/// Compute and emit the real CodeView FrameData subsection.
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bool X86WinCOFFTargetStreamer::emitFPOData(const MCSymbol *ProcSym, SMLoc L) {
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MCStreamer &OS = getStreamer();
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MCContext &Ctx = OS.getContext();
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auto I = AllFPOData.find(ProcSym);
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if (I == AllFPOData.end()) {
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Ctx.reportError(L, Twine("no FPO data found for symbol ") +
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ProcSym->getName());
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return true;
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}
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const FPOData *FPO = I->second.get();
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assert(FPO->Begin && FPO->End && FPO->PrologueEnd && "missing FPO label");
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MCSymbol *FrameBegin = Ctx.createTempSymbol(),
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*FrameEnd = Ctx.createTempSymbol();
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OS.emitInt32(unsigned(DebugSubsectionKind::FrameData));
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OS.emitAbsoluteSymbolDiff(FrameEnd, FrameBegin, 4);
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OS.emitLabel(FrameBegin);
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// Start with the RVA of the function in question.
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OS.emitValue(MCSymbolRefExpr::create(FPO->Function,
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MCSymbolRefExpr::VK_COFF_IMGREL32, Ctx),
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4);
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// Emit a sequence of FrameData records.
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FPOStateMachine FSM(FPO);
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FSM.emitFrameDataRecord(OS, FPO->Begin);
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for (const FPOInstruction &Inst : FPO->Instructions) {
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switch (Inst.Op) {
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case FPOInstruction::PushReg:
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FSM.CurOffset += 4;
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FSM.SavedRegSize += 4;
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FSM.RegSaveOffsets.push_back({Inst.RegOrOffset, FSM.CurOffset});
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break;
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case FPOInstruction::SetFrame:
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FSM.FrameReg = Inst.RegOrOffset;
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FSM.FrameRegOff = FSM.CurOffset;
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break;
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case FPOInstruction::StackAlign:
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FSM.StackOffsetBeforeAlign = FSM.CurOffset;
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FSM.StackAlign = Inst.RegOrOffset;
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break;
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case FPOInstruction::StackAlloc:
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FSM.CurOffset += Inst.RegOrOffset;
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FSM.LocalSize += Inst.RegOrOffset;
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// No need to emit FrameData for stack allocations with a frame pointer.
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if (FSM.FrameReg)
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continue;
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break;
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}
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FSM.emitFrameDataRecord(OS, Inst.Label);
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}
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OS.emitValueToAlignment(4, 0);
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OS.emitLabel(FrameEnd);
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return false;
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}
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MCTargetStreamer *llvm::createX86AsmTargetStreamer(MCStreamer &S,
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formatted_raw_ostream &OS,
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MCInstPrinter *InstPrinter,
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bool IsVerboseAsm) {
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// FIXME: This makes it so we textually assemble COFF directives on ELF.
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// That's kind of nonsensical.
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return new X86WinCOFFAsmTargetStreamer(S, OS, *InstPrinter);
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}
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MCTargetStreamer *
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llvm::createX86ObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
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// No need to register a target streamer.
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if (!STI.getTargetTriple().isOSBinFormatCOFF())
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return nullptr;
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// Registers itself to the MCStreamer.
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return new X86WinCOFFTargetStreamer(S);
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}
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