158 lines
7.0 KiB
TableGen
158 lines
7.0 KiB
TableGen
//=- SystemZCallingConv.td - Calling conventions for SystemZ -*- tablegen -*-=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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// This describes the calling conventions for the SystemZ ABI.
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//===----------------------------------------------------------------------===//
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class CCIfExtend<CCAction A>
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: CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>;
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class CCIfSubtarget<string F, CCAction A>
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: CCIf<!strconcat("static_cast<const SystemZSubtarget&>"
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"(State.getMachineFunction().getSubtarget()).", F),
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A>;
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// Match if this specific argument is a fixed (i.e. named) argument.
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class CCIfFixed<CCAction A>
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: CCIf<"static_cast<SystemZCCState *>(&State)->IsFixed(ValNo)", A>;
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// Match if this specific argument was widened from a short vector type.
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class CCIfShortVector<CCAction A>
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: CCIf<"static_cast<SystemZCCState *>(&State)->IsShortVector(ValNo)", A>;
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//===----------------------------------------------------------------------===//
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// z/Linux return value calling convention
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//===----------------------------------------------------------------------===//
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def RetCC_SystemZ : CallingConv<[
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// Promote i32 to i64 if it has an explicit extension type.
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CCIfType<[i32], CCIfExtend<CCPromoteToType<i64>>>,
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// A SwiftError is returned in R9.
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CCIfSwiftError<CCIfType<[i64], CCAssignToReg<[R9D]>>>,
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// ABI-compliant code returns 64-bit integers in R2. Make the other
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// call-clobbered argument registers available for code that doesn't
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// care about the ABI. (R6 is an argument register too, but is
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// call-saved and therefore not suitable for return values.)
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CCIfType<[i32], CCAssignToReg<[R2L, R3L, R4L, R5L]>>,
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CCIfType<[i64], CCAssignToReg<[R2D, R3D, R4D, R5D]>>,
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// ABI-complaint code returns float and double in F0. Make the
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// other floating-point argument registers available for code that
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// doesn't care about the ABI. All floating-point argument registers
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// are call-clobbered, so we can use all of them here.
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CCIfType<[f32], CCAssignToReg<[F0S, F2S, F4S, F6S]>>,
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CCIfType<[f64], CCAssignToReg<[F0D, F2D, F4D, F6D]>>,
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// Similarly for vectors, with V24 being the ABI-compliant choice.
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// Sub-128 vectors are returned in the same way, but they're widened
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// to one of these types during type legalization.
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CCIfSubtarget<"hasVector()",
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CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
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CCAssignToReg<[V24, V26, V28, V30, V25, V27, V29, V31]>>>
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]>;
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//===----------------------------------------------------------------------===//
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// z/Linux argument calling conventions for GHC
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//===----------------------------------------------------------------------===//
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def CC_SystemZ_GHC : CallingConv<[
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// Pass in STG registers: Base, Sp, Hp, R1, R2, R3, R4, R5, R6, R7, R8, SpLim
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CCIfType<[i64], CCAssignToReg<[R7D, R8D, R10D, R11D, R12D, R13D,
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R6D, R2D, R3D, R4D, R5D, R9D]>>,
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// Pass in STG registers: F1, ..., F6
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CCIfType<[f32], CCAssignToReg<[F8S, F9S, F10S, F11S, F0S, F1S]>>,
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// Pass in STG registers: D1, ..., D6
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CCIfType<[f64], CCAssignToReg<[F12D, F13D, F14D, F15D, F2D, F3D]>>,
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// Pass in STG registers: XMM1, ..., XMM6
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CCIfSubtarget<"hasVector()",
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CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
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CCIfFixed<CCAssignToReg<[V16, V17, V18, V19, V20, V21]>>>>,
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// Fail otherwise
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CCCustom<"CC_SystemZ_GHC_Error">
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]>;
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//===----------------------------------------------------------------------===//
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// z/Linux argument calling conventions
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//===----------------------------------------------------------------------===//
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def CC_SystemZ : CallingConv<[
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CCIfCC<"CallingConv::GHC", CCDelegateTo<CC_SystemZ_GHC>>,
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// Promote i32 to i64 if it has an explicit extension type.
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// The convention is that true integer arguments that are smaller
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// than 64 bits should be marked as extended, but structures that
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// are smaller than 64 bits shouldn't.
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CCIfType<[i32], CCIfExtend<CCPromoteToType<i64>>>,
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// A SwiftSelf is passed in callee-saved R10.
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CCIfSwiftSelf<CCIfType<[i64], CCAssignToReg<[R10D]>>>,
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// A SwiftError is passed in callee-saved R9.
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CCIfSwiftError<CCIfType<[i64], CCAssignToReg<[R9D]>>>,
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// Force long double values to the stack and pass i64 pointers to them.
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CCIfType<[f128], CCPassIndirect<i64>>,
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// Same for i128 values. These are already split into two i64 here,
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// so we have to use a custom handler.
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CCIfType<[i64], CCCustom<"CC_SystemZ_I128Indirect">>,
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// The first 5 integer arguments are passed in R2-R6. Note that R6
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// is call-saved.
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CCIfType<[i32], CCAssignToReg<[R2L, R3L, R4L, R5L, R6L]>>,
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CCIfType<[i64], CCAssignToReg<[R2D, R3D, R4D, R5D, R6D]>>,
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// The first 4 float and double arguments are passed in even registers F0-F6.
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CCIfType<[f32], CCAssignToReg<[F0S, F2S, F4S, F6S]>>,
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CCIfType<[f64], CCAssignToReg<[F0D, F2D, F4D, F6D]>>,
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// The first 8 named vector arguments are passed in V24-V31. Sub-128 vectors
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// are passed in the same way, but they're widened to one of these types
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// during type legalization.
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CCIfSubtarget<"hasVector()",
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CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
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CCIfFixed<CCAssignToReg<[V24, V26, V28, V30,
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V25, V27, V29, V31]>>>>,
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// However, sub-128 vectors which need to go on the stack occupy just a
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// single 8-byte-aligned 8-byte stack slot. Pass as i64.
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CCIfSubtarget<"hasVector()",
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CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
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CCIfShortVector<CCBitConvertToType<i64>>>>,
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// Other vector arguments are passed in 8-byte-aligned 16-byte stack slots.
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CCIfSubtarget<"hasVector()",
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CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
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CCAssignToStack<16, 8>>>,
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// Other arguments are passed in 8-byte-aligned 8-byte stack slots.
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CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>
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]>;
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//===----------------------------------------------------------------------===//
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// z/Linux callee-saved registers
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//===----------------------------------------------------------------------===//
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def CSR_SystemZ : CalleeSavedRegs<(add (sequence "R%dD", 6, 15),
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(sequence "F%dD", 8, 15))>;
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// R9 is used to return SwiftError; remove it from CSR.
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def CSR_SystemZ_SwiftError : CalleeSavedRegs<(sub CSR_SystemZ, R9D)>;
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// "All registers" as used by the AnyReg calling convention.
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// Note that registers 0 and 1 are still defined as intra-call scratch
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// registers that may be clobbered e.g. by PLT stubs.
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def CSR_SystemZ_AllRegs : CalleeSavedRegs<(add (sequence "R%dD", 2, 15),
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(sequence "F%dD", 0, 15))>;
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def CSR_SystemZ_AllRegs_Vector : CalleeSavedRegs<(add (sequence "R%dD", 2, 15),
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(sequence "V%d", 0, 31))>;
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def CSR_SystemZ_NoRegs : CalleeSavedRegs<(add)>;
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