15 lines
573 B
TableGen
15 lines
573 B
TableGen
//===- MipsRegisterBank.td ---------------------------------*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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def GPRBRegBank : RegisterBank<"GPRB", [GPR32]>;
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def FPRBRegBank : RegisterBank<"FPRB", [FGR64, AFGR64, MSA128D]>;
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