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=========================
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LLVM 12.0.0 Release Notes
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=========================
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.. contents::
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:local:
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.. warning::
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These are in-progress notes for the upcoming LLVM 12 release.
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Release notes for previous releases can be found on
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`the Download Page <https://releases.llvm.org/download.html>`_.
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Introduction
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============
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This document contains the release notes for the LLVM Compiler Infrastructure,
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release 12.0.0. Here we describe the status of LLVM, including major improvements
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from the previous release, improvements in various subprojects of LLVM, and
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some of the current users of the code. All LLVM releases may be downloaded
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from the `LLVM releases web site <https://llvm.org/releases/>`_.
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For more information about LLVM, including information about the latest
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release, please check out the `main LLVM web site <https://llvm.org/>`_. If you
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have questions or comments, the `LLVM Developer's Mailing List
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<https://lists.llvm.org/mailman/listinfo/llvm-dev>`_ is a good place to send
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them.
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Note that if you are reading this file from a Git checkout or the main
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LLVM web page, this document applies to the *next* release, not the current
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one. To see the release notes for a specific release, please see the `releases
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page <https://llvm.org/releases/>`_.
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Non-comprehensive list of changes in this release
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=================================================
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.. NOTE
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For small 1-3 sentence descriptions, just add an entry at the end of
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this list. If your description won't fit comfortably in one bullet
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point (e.g. maybe you would like to give an example of the
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functionality, or simply have a lot to talk about), see the `NOTE` below
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for adding a new subsection.
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* The ConstantPropagation pass was removed. Users should use the InstSimplify
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pass instead.
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.. NOTE
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If you would like to document a larger change, then you can add a
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subsection about it right here. You can copy the following boilerplate
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and un-indent it (the indentation causes it to be inside this comment).
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Special New Feature
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-------------------
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Makes programs 10x faster by doing Special New Thing.
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Changes to the LLVM IR
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----------------------
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* ...
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* Added the ``byref`` attribute to better represent argument passing
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for the `amdgpu_kernel` calling convention.
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* Added type parameter to the ``sret`` attribute to continue work on
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removing pointer element types.
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* The ``llvm.experimental.vector.reduce`` family of intrinsics have been renamed
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to drop the "experimental" from the name, reflecting their now fully supported
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status in the IR.
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Changes to building LLVM
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------------------------
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* The internal ``llvm-build`` Python script and the associated ``LLVMBuild.txt``
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files used to describe the LLVM component structure have been removed and
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replaced by a pure ``CMake`` approach, where each component stores extra
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properties in the created targets. These properties are processed once all
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components are defined to resolve library dependencies and produce the header
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expected by llvm-config.
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Changes to TableGen
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-------------------
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* The new "TableGen Programmer's Reference" replaces the "TableGen Language
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Introduction" and "TableGen Language Reference" documents.
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* The syntax for specifying an integer range in a range list has changed.
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The old syntax used a hyphen in the range (e.g., ``{0-9}``). The new syntax
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uses the "`...`" range punctuation (e.g., ``{0...9}``). The hyphen syntax
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is deprecated.
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Changes to the AArch64 Backend
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--------------------------
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During this release ...
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* Lots of improvements to generation of Windows unwind data; the unwind
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data is optimized and written in packed form where possible, reducing
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the size of unwind data (pdata and xdata sections) by around 60%
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compared with LLVM 11. The generation of prologs/epilogs is tweaked
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when targeting Windows, to increase the chances of being able to use
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the packed unwind info format.
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* Support for creating Windows unwind data using ``.seh_*`` assembler
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directives.
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* Produce proper assembly output for the Windows target, including
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``:lo12:`` relocation specifiers, to allow the assembly output
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to actually be assembled.
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* Changed the assembly comment string for MSVC targets to ``//`` (consistent
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with the MinGW and ELF targets), freeing up ``;`` to be used as
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statement separator.
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Changes to the ARM Backend
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--------------------------
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During this release ...
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Changes to the MIPS Target
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--------------------------
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During this release ...
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Changes to the PowerPC Target
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-----------------------------
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Optimization:
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* Made improvements to loop unroll-and-jam including fix to respect user
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provided #pragma unroll-and-jam for loops on targets other than ARM.
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* Improved PartialInliner allowing it to handle code regions in a switch
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statements.
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* Improved PGO support on AIX by building and linking with compiler-rt profile
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library.
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* Add support for Epilogue Vectorization and enabled it by default.
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CodeGen:
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* POWER10 support
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* Implementation of PC Relative addressing in LLD including the associated
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linker optimizations.
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* Add support for the new matrix multiplication (MMA) instructions to Clang
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and LLVM.
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* Implementation of Power10 builtins.
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* Scheduling enhancements
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* Add a new algorithm to cluster more loads/stores if the DAG is not too
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complicated.
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* Enable the PowerPC scheduling heuristic for Power10.
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* Target dependent passes tuning
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* Enhance LoopStrengthReduce/PPCLoopInstrFormPrep pass for PowerPC,
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especially for P10 intrinsics.
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* Enhance machine combiner pass to reduce register pressure for PowerPC.
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* Improve MachineSink to do more sinking based on register pressure and alias
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analysis.
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* General improvements
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* Complete the constrained floating point operations support.
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* Improve the llvm-exegesis support.
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* Improve the stack clash protection to probe the gap between stackptr and
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realigned stackptr.
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* Improve the IEEE long double support for Power8.
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* Enable MemorySSA for LoopSink.
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* Enhance LLVM debugging functionality via options such as -print-changed and
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-print-before-changed.
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* Add builtins for Power9 (i.e. darn, xvtdiv, xvtsqrt etc).
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* Add options to disable all or part of LoopIdiomRecognizePass.
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* Add support for printing the DDG in DOT form allowing for visual inspection
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of the Data Dependence Graph.
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* Remove the QPX support.
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* Significant number of bug fixes including all the fixes necessary to
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achieve a clean test run for Julia.
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AIX Support:
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* Compiler-rt support
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* Add support for building compiler-rt for AIX and 32-bit Power targets.
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* Made compiler-rt the default rtlib for AIX.
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* General Improvements
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* Enable the AIX extended AltiVec ABI under option -mabi=vec-extabi.
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* Add partial C99 complex type support.
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* Implemente traceback table for functions (encodes vector information,
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emits exception handling).
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* Implemente code generation for C++ dynamic initialization and finalization.
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of non-local variables for use with the -bcdtors option of the AIX linker.
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* Add new option -mignore-xcoff-visibility.
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* Enable explicit sections on AIX.
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* Enable -f[no-]data-sections on AIX and set -fdata-sections to be the default
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on AIX.
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* Enable -f[no-]function-sections.
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* Add support for relocation generation using the large code model.
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* Add pragma align natural and sorted out pragma pack stack effect.
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Changes to the X86 Target
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-------------------------
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During this release ...
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* The 'mpx' feature was removed from the backend. It had been removed from clang
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frontend in 10.0. Mention of the 'mpx' feature in an IR file will print a
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message to stderr, but IR should still compile.
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* Support for ``-march=alderlake``, ``-march=sapphirerapids``,
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``-march=znver3`` and ``-march=x86-64-v[234]`` has been added.
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* The assembler now has support for {disp32} and {disp8} pseudo prefixes for
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controlling displacement size for memory operands and jump displacements. The
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assembler also supports the .d32 and .d8 mnemonic suffixes to do the same.
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* A new function attribute "tune-cpu" has been added to support -mtune like gcc.
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This allows microarchitectural optimizations to be applied independent from
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the "target-cpu" attribute or TargetMachine CPU which will be used to select
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Instruction Set. If the attribute is not present, the tune CPU will follow
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the target CPU.
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* Support for ``HRESET`` instructions has been added.
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* Support for ``UINTR`` instructions has been added.
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* Support for ``AVXVNNI`` instructions has been added.
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Changes to the AMDGPU Target
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-----------------------------
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During this release ...
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* The new ``byref`` attribute is now the preferred method for
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representing aggregate kernel arguments.
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Changes to the AVR Target
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-----------------------------
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During this release ...
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Changes to the WebAssembly Target
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---------------------------------
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During this release ...
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Changes to the OCaml bindings
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-----------------------------
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Changes to the C API
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--------------------
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Changes to the Go bindings
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--------------------------
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Changes to the DAG infrastructure
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---------------------------------
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Changes to the Debug Info
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---------------------------------
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During this release ...
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* The DIModule metadata is extended with a field to indicate if it is a
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module declaration. This extension enables the emission of debug info
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for a Fortran 'use <external module>' statement. For more information
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on what the debug info entries should look like and how the debugger
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can use them, please see test/DebugInfo/X86/dimodule-external-fortran.ll.
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Changes to the LLVM tools
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---------------------------------
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* llvm-readobj and llvm-readelf behavior has changed to report an error when
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executed with no input files instead of reading an input from stdin.
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Reading from stdin can still be achieved by specifying `-` as an input file.
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* llvm-mca supports serialization of the timeline and summary views.
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The `--json` command line option prints a JSON representation of
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these views to stdout.
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Changes to LLDB
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---------------------------------
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Changes to Sanitizers
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---------------------
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The integer sanitizer `-fsanitize=integer` now has a new sanitizer:
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`-fsanitize=unsigned-shift-base`. It's not undefined behavior for an unsigned
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left shift to overflow (i.e. to shift bits out), but it has been the source of
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bugs and exploits in certain codebases in the past.
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Many Sanitizers (asan, cfi, lsan, msan, tsan, ubsan) have support for
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musl-based Linux distributions. Some of them may be rudimentary.
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External Open Source Projects Using LLVM 12
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===========================================
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* A project...
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Additional Information
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======================
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A wide variety of additional information is available on the `LLVM web page
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<https://llvm.org/>`_, in particular in the `documentation
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<https://llvm.org/docs/>`_ section. The web page also contains versions of the
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API documentation which is up-to-date with the Git version of the source
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code. You can access versions of these documents specific to this release by
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going into the ``llvm/docs/`` directory in the LLVM tree.
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If you have any questions or comments about LLVM, please feel free to contact
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us via the `mailing lists <https://llvm.org/docs/#mailing-lists>`_.
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