302 lines
9.5 KiB
LLVM
302 lines
9.5 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instsimplify -S -verify | FileCheck %s
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; Unary Operations
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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define <vscale x 2 x double> @fneg(<vscale x 2 x double> %val) {
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; CHECK-LABEL: @fneg(
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; CHECK-NEXT: ret <vscale x 2 x double> undef
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;
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%r = fneg <vscale x 2 x double> undef
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ret <vscale x 2 x double> %r
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; Binary Operations
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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define <vscale x 4 x i32> @add() {
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; CHECK-LABEL: @add(
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; CHECK-NEXT: ret <vscale x 4 x i32> undef
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;
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%r = add <vscale x 4 x i32> undef, undef
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ret <vscale x 4 x i32> %r
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}
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define <vscale x 4 x float> @fadd() {
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; CHECK-LABEL: @fadd(
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; CHECK-NEXT: ret <vscale x 4 x float> undef
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;
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%r = fadd <vscale x 4 x float> undef, undef
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ret <vscale x 4 x float> %r
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}
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define <vscale x 4 x i32> @sub() {
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; CHECK-LABEL: @sub(
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; CHECK-NEXT: ret <vscale x 4 x i32> undef
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;
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%r = sub <vscale x 4 x i32> undef, undef
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ret <vscale x 4 x i32> %r
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}
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define <vscale x 4 x i32> @sub_splat() {
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; CHECK-LABEL: @sub_splat(
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; CHECK-NEXT: ret <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> undef, i32 -16, i32 0), <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer)
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;
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%r = sub <vscale x 4 x i32> zeroinitializer, shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> undef, i32 16, i32 0), <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer)
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ret <vscale x 4 x i32> %r
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}
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define <vscale x 4 x float> @fsub() {
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; CHECK-LABEL: @fsub(
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; CHECK-NEXT: ret <vscale x 4 x float> undef
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;
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%r = fsub <vscale x 4 x float> undef, undef
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ret <vscale x 4 x float> %r
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}
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define <vscale x 4 x i32> @mul() {
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; CHECK-LABEL: @mul(
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; CHECK-NEXT: ret <vscale x 4 x i32> undef
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;
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%r = mul <vscale x 4 x i32> undef, undef
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ret <vscale x 4 x i32> %r
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}
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define <vscale x 4 x float> @fmul() {
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; CHECK-LABEL: @fmul(
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; CHECK-NEXT: ret <vscale x 4 x float> undef
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;
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%r = fmul <vscale x 4 x float> undef, undef
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ret <vscale x 4 x float> %r
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}
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define <vscale x 4 x i32> @udiv() {
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; CHECK-LABEL: @udiv(
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; CHECK-NEXT: ret <vscale x 4 x i32> undef
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;
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%r = udiv <vscale x 4 x i32> undef, undef
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ret <vscale x 4 x i32> %r
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}
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define <vscale x 4 x i32> @udiv_splat_zero() {
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; CHECK-LABEL: @udiv_splat_zero(
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; CHECK-NEXT: ret <vscale x 4 x i32> undef
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;
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%r = udiv <vscale x 4 x i32> zeroinitializer, zeroinitializer
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ret <vscale x 4 x i32> %r
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}
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define <vscale x 4 x i32> @sdiv() {
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; CHECK-LABEL: @sdiv(
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; CHECK-NEXT: ret <vscale x 4 x i32> undef
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;
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%r = sdiv <vscale x 4 x i32> undef, undef
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ret <vscale x 4 x i32> %r
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}
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define <vscale x 4 x float> @fdiv() {
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; CHECK-LABEL: @fdiv(
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; CHECK-NEXT: ret <vscale x 4 x float> undef
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;
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%r = fdiv <vscale x 4 x float> undef, undef
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ret <vscale x 4 x float> %r
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}
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define <vscale x 4 x i32> @urem() {
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; CHECK-LABEL: @urem(
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; CHECK-NEXT: ret <vscale x 4 x i32> undef
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;
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%r = urem <vscale x 4 x i32> undef, undef
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ret <vscale x 4 x i32> %r
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}
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define <vscale x 4 x i32> @srem() {
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; CHECK-LABEL: @srem(
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; CHECK-NEXT: ret <vscale x 4 x i32> undef
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;
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%r = srem <vscale x 4 x i32> undef, undef
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ret <vscale x 4 x i32> %r
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}
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define <vscale x 4 x float> @frem() {
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; CHECK-LABEL: @frem(
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; CHECK-NEXT: ret <vscale x 4 x float> undef
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;
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%r = frem <vscale x 4 x float> undef, undef
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ret <vscale x 4 x float> %r
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; Bitwise Binary Operations
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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define <vscale x 4 x i32> @shl() {
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; CHECK-LABEL: @shl(
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; CHECK-NEXT: ret <vscale x 4 x i32> undef
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;
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%r = shl <vscale x 4 x i32> undef, undef
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ret <vscale x 4 x i32> %r
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}
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define <vscale x 4 x i32> @lshr() {
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; CHECK-LABEL: @lshr(
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; CHECK-NEXT: ret <vscale x 4 x i32> undef
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;
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%r = lshr <vscale x 4 x i32> undef, undef
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ret <vscale x 4 x i32> %r
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}
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define <vscale x 4 x i32> @ashr() {
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; CHECK-LABEL: @ashr(
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; CHECK-NEXT: ret <vscale x 4 x i32> undef
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;
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%r = ashr <vscale x 4 x i32> undef, undef
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ret <vscale x 4 x i32> %r
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}
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define <vscale x 4 x i32> @and() {
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; CHECK-LABEL: @and(
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; CHECK-NEXT: ret <vscale x 4 x i32> undef
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;
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%r = and <vscale x 4 x i32> undef, undef
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ret <vscale x 4 x i32> %r
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}
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define <vscale x 4 x i32> @or() {
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; CHECK-LABEL: @or(
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; CHECK-NEXT: ret <vscale x 4 x i32> undef
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;
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%r = or <vscale x 4 x i32> undef, undef
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ret <vscale x 4 x i32> %r
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}
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define <vscale x 4 x i32> @xor() {
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; CHECK-LABEL: @xor(
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; CHECK-NEXT: ret <vscale x 4 x i32> zeroinitializer
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;
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%r = xor <vscale x 4 x i32> undef, undef
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ret <vscale x 4 x i32> %r
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; Vector Operations
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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define <vscale x 4 x i32> @insertelement() {
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; CHECK-LABEL: @insertelement(
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; CHECK-NEXT: ret <vscale x 4 x i32> insertelement (<vscale x 4 x i32> undef, i32 1, i32 0)
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;
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%i = insertelement <vscale x 4 x i32> undef, i32 1, i32 0
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ret <vscale x 4 x i32> %i
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}
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define <vscale x 4 x i32> @shufflevector() {
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; CHECK-LABEL: @shufflevector(
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; CHECK-NEXT: ret <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> undef, i32 1, i32 0), <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer)
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;
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%i = insertelement <vscale x 4 x i32> undef, i32 1, i32 0
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%i2 = shufflevector <vscale x 4 x i32> %i, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
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ret <vscale x 4 x i32> %i2
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; Memory Access and Addressing Operations
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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define <vscale x 2 x double> @load() {
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; CHECK-LABEL: @load(
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; CHECK-NEXT: [[R:%.*]] = load <vscale x 2 x double>, <vscale x 2 x double>* getelementptr (<vscale x 2 x double>, <vscale x 2 x double>* null, i64 1), align 16
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; CHECK-NEXT: ret <vscale x 2 x double> [[R]]
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;
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%r = load <vscale x 2 x double>, <vscale x 2 x double>* getelementptr (<vscale x 2 x double>, <vscale x 2 x double>* null, i64 1)
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ret <vscale x 2 x double> %r
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; Conversion Operations
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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define <vscale x 4 x float> @bitcast() {
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; CHECK-LABEL: @bitcast(
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; CHECK-NEXT: ret <vscale x 4 x float> bitcast (<vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> undef, i32 1, i32 0), <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer) to <vscale x 4 x float>)
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;
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%i1 = insertelement <vscale x 4 x i32> undef, i32 1, i32 0
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%i2 = shufflevector <vscale x 4 x i32> %i1, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
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%i3 = bitcast <vscale x 4 x i32> %i2 to <vscale x 4 x float>
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ret <vscale x 4 x float> %i3
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; Other Operations
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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define <vscale x 4 x i32> @select() {
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; CHECK-LABEL: @select(
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; CHECK-NEXT: ret <vscale x 4 x i32> undef
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;
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%r = select <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> undef
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ret <vscale x 4 x i32> %r
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}
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declare <vscale x 16 x i8> @llvm.something(<vscale x 16 x i8>, <vscale x 16 x i8>)
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define <vscale x 16 x i8> @call() {
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; CHECK-LABEL: @call(
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; CHECK-NEXT: [[R:%.*]] = call <vscale x 16 x i8> @llvm.something(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
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; CHECK-NEXT: ret <vscale x 16 x i8> [[R]]
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;
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%r = call <vscale x 16 x i8> @llvm.something(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
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ret <vscale x 16 x i8> %r
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}
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define <vscale x 4 x i1> @icmp_undef() {
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; CHECK-LABEL: @icmp_undef(
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; CHECK-NEXT: ret <vscale x 4 x i1> undef
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;
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%r = icmp eq <vscale x 4 x i32> undef, undef
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ret <vscale x 4 x i1> %r
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}
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define <vscale x 4 x i1> @icmp_zero() {
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; CHECK-LABEL: @icmp_zero(
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; CHECK-NEXT: ret <vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> undef, i1 true, i32 0), <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer)
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;
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%r = icmp eq <vscale x 4 x i32> zeroinitializer, zeroinitializer
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ret <vscale x 4 x i1> %r
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}
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define <vscale x 4 x i1> @fcmp_true() {
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; CHECK-LABEL: @fcmp_true(
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; CHECK-NEXT: ret <vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> undef, i1 true, i32 0), <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer)
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;
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%r = fcmp true <vscale x 4 x float> undef, undef
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ret <vscale x 4 x i1> %r
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}
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define <vscale x 4 x i1> @fcmp_false() {
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; CHECK-LABEL: @fcmp_false(
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; CHECK-NEXT: ret <vscale x 4 x i1> zeroinitializer
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;
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%r = fcmp false <vscale x 4 x float> undef, undef
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ret <vscale x 4 x i1> %r
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}
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define <vscale x 4 x i1> @fcmp_undef() {
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; CHECK-LABEL: @fcmp_undef(
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; CHECK-NEXT: ret <vscale x 4 x i1> undef
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;
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%r = icmp ne <vscale x 4 x i32> undef, undef
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ret <vscale x 4 x i1> %r
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}
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define <vscale x 4 x i1> @fcmp_not_equality() {
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; CHECK-LABEL: @fcmp_not_equality(
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; CHECK-NEXT: ret <vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> undef, i1 true, i32 0), <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer)
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;
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%r = icmp ule <vscale x 4 x i32> undef, zeroinitializer
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ret <vscale x 4 x i1> %r
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}
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