364 lines
13 KiB
LLVM
364 lines
13 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; If we have some pattern that leaves only some low bits set, and then performs
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; left-shift of those bits, if none of the bits that are left after the final
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; shift are modified by the mask, we can omit the mask.
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; There are many variants to this pattern:
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; d) (x & ((-1 << maskNbits) >> maskNbits)) << shiftNbits
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; simplify to:
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; x << shiftNbits
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; iff (shiftNbits-maskNbits) s>= 0 (i.e. shiftNbits u>= maskNbits)
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; Simple tests. We don't care about extra uses.
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declare void @use32(i32)
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define i32 @t0_basic(i32 %x, i32 %nbits) {
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; CHECK-LABEL: @t0_basic(
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; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
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; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]]
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; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]]
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; CHECK-NEXT: call void @use32(i32 [[T0]])
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; CHECK-NEXT: call void @use32(i32 [[T1]])
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; CHECK-NEXT: call void @use32(i32 [[T2]])
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; CHECK-NEXT: [[T4:%.*]] = shl i32 [[X]], [[NBITS]]
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; CHECK-NEXT: ret i32 [[T4]]
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;
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%t0 = shl i32 -1, %nbits
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%t1 = lshr i32 %t0, %nbits
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%t2 = and i32 %t1, %x
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call void @use32(i32 %t0)
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call void @use32(i32 %t1)
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call void @use32(i32 %t2)
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%t4 = shl i32 %t2, %nbits
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ret i32 %t4
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}
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define i32 @t1_bigger_shift(i32 %x, i32 %nbits) {
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; CHECK-LABEL: @t1_bigger_shift(
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; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
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; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]]
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; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]]
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; CHECK-NEXT: [[T3:%.*]] = add i32 [[NBITS]], 1
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; CHECK-NEXT: call void @use32(i32 [[T0]])
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; CHECK-NEXT: call void @use32(i32 [[T1]])
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; CHECK-NEXT: call void @use32(i32 [[T2]])
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; CHECK-NEXT: call void @use32(i32 [[T3]])
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; CHECK-NEXT: [[T4:%.*]] = shl i32 [[X]], [[T3]]
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; CHECK-NEXT: ret i32 [[T4]]
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;
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%t0 = shl i32 -1, %nbits
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%t1 = lshr i32 %t0, %nbits
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%t2 = and i32 %t1, %x
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%t3 = add i32 %nbits, 1
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call void @use32(i32 %t0)
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call void @use32(i32 %t1)
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call void @use32(i32 %t2)
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call void @use32(i32 %t3)
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%t4 = shl i32 %t2, %t3
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ret i32 %t4
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}
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; Vectors
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declare void @use3xi32(<3 x i32>)
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define <3 x i32> @t2_vec_splat(<3 x i32> %x, <3 x i32> %nbits) {
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; CHECK-LABEL: @t2_vec_splat(
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; CHECK-NEXT: [[T0:%.*]] = shl <3 x i32> <i32 -1, i32 -1, i32 -1>, [[NBITS:%.*]]
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; CHECK-NEXT: [[T1:%.*]] = lshr <3 x i32> [[T0]], [[NBITS]]
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; CHECK-NEXT: [[T2:%.*]] = and <3 x i32> [[T1]], [[X:%.*]]
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; CHECK-NEXT: [[T3:%.*]] = add <3 x i32> [[NBITS]], <i32 1, i32 1, i32 1>
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; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T0]])
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; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T1]])
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; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T2]])
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; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T3]])
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; CHECK-NEXT: [[T4:%.*]] = shl <3 x i32> [[X]], [[T3]]
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; CHECK-NEXT: ret <3 x i32> [[T4]]
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;
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%t0 = shl <3 x i32> <i32 -1, i32 -1, i32 -1>, %nbits
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%t1 = lshr <3 x i32> %t0, %nbits
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%t2 = and <3 x i32> %t1, %x
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%t3 = add <3 x i32> %nbits, <i32 1, i32 1, i32 1>
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call void @use3xi32(<3 x i32> %t0)
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call void @use3xi32(<3 x i32> %t1)
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call void @use3xi32(<3 x i32> %t2)
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call void @use3xi32(<3 x i32> %t3)
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%t4 = shl <3 x i32> %t2, %t3
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ret <3 x i32> %t4
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}
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define <3 x i32> @t3_vec_nonsplat(<3 x i32> %x, <3 x i32> %nbits) {
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; CHECK-LABEL: @t3_vec_nonsplat(
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; CHECK-NEXT: [[T0:%.*]] = shl <3 x i32> <i32 -1, i32 -1, i32 -1>, [[NBITS:%.*]]
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; CHECK-NEXT: [[T1:%.*]] = lshr <3 x i32> [[T0]], [[NBITS]]
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; CHECK-NEXT: [[T2:%.*]] = and <3 x i32> [[T1]], [[X:%.*]]
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; CHECK-NEXT: [[T3:%.*]] = add <3 x i32> [[NBITS]], <i32 1, i32 0, i32 2>
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; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T0]])
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; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T1]])
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; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T2]])
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; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T3]])
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; CHECK-NEXT: [[T4:%.*]] = shl <3 x i32> [[X]], [[T3]]
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; CHECK-NEXT: ret <3 x i32> [[T4]]
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;
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%t0 = shl <3 x i32> <i32 -1, i32 -1, i32 -1>, %nbits
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%t1 = lshr <3 x i32> %t0, %nbits
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%t2 = and <3 x i32> %t1, %x
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%t3 = add <3 x i32> %nbits, <i32 1, i32 0, i32 2>
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call void @use3xi32(<3 x i32> %t0)
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call void @use3xi32(<3 x i32> %t1)
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call void @use3xi32(<3 x i32> %t2)
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call void @use3xi32(<3 x i32> %t3)
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%t4 = shl <3 x i32> %t2, %t3
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ret <3 x i32> %t4
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}
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define <3 x i32> @t4_vec_undef(<3 x i32> %x, <3 x i32> %nbits) {
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; CHECK-LABEL: @t4_vec_undef(
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; CHECK-NEXT: [[T0:%.*]] = shl <3 x i32> <i32 -1, i32 undef, i32 -1>, [[NBITS:%.*]]
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; CHECK-NEXT: [[T1:%.*]] = lshr <3 x i32> [[T0]], [[NBITS]]
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; CHECK-NEXT: [[T2:%.*]] = and <3 x i32> [[T1]], [[X:%.*]]
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; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T0]])
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; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T1]])
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; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T2]])
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; CHECK-NEXT: call void @use3xi32(<3 x i32> [[NBITS]])
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; CHECK-NEXT: [[T4:%.*]] = shl <3 x i32> [[X]], [[NBITS]]
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; CHECK-NEXT: ret <3 x i32> [[T4]]
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;
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%t0 = shl <3 x i32> <i32 -1, i32 undef, i32 -1>, %nbits
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%t1 = lshr <3 x i32> %t0, %nbits
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%t2 = and <3 x i32> %t1, %x
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%t3 = add <3 x i32> %nbits, <i32 0, i32 undef, i32 0>
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call void @use3xi32(<3 x i32> %t0)
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call void @use3xi32(<3 x i32> %t1)
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call void @use3xi32(<3 x i32> %t2)
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call void @use3xi32(<3 x i32> %t3)
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%t4 = shl <3 x i32> %t2, %t3
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ret <3 x i32> %t4
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}
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; Commutativity
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declare i32 @gen32()
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define i32 @t5_commutativity0(i32 %nbits) {
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; CHECK-LABEL: @t5_commutativity0(
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; CHECK-NEXT: [[X:%.*]] = call i32 @gen32()
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; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
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; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]]
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; CHECK-NEXT: [[T2:%.*]] = and i32 [[X]], [[T1]]
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; CHECK-NEXT: call void @use32(i32 [[T0]])
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; CHECK-NEXT: call void @use32(i32 [[T1]])
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; CHECK-NEXT: call void @use32(i32 [[T2]])
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; CHECK-NEXT: [[T3:%.*]] = shl i32 [[X]], [[NBITS]]
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; CHECK-NEXT: ret i32 [[T3]]
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;
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%x = call i32 @gen32()
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%t0 = shl i32 -1, %nbits
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%t1 = lshr i32 %t0, %nbits
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%t2 = and i32 %x, %t1 ; swapped order
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call void @use32(i32 %t0)
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call void @use32(i32 %t1)
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call void @use32(i32 %t2)
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%t3 = shl i32 %t2, %nbits
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ret i32 %t3
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}
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define i32 @t6_commutativity1(i32 %nbits0, i32 %nbits1) {
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; CHECK-LABEL: @t6_commutativity1(
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; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS0:%.*]]
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; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS0]]
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; CHECK-NEXT: [[T2:%.*]] = shl i32 -1, [[NBITS1:%.*]]
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; CHECK-NEXT: [[T3:%.*]] = lshr i32 [[T0]], [[NBITS1]]
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; CHECK-NEXT: [[T4:%.*]] = and i32 [[T3]], [[T1]]
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; CHECK-NEXT: call void @use32(i32 [[T0]])
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; CHECK-NEXT: call void @use32(i32 [[T1]])
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; CHECK-NEXT: call void @use32(i32 [[T2]])
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; CHECK-NEXT: call void @use32(i32 [[T3]])
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; CHECK-NEXT: call void @use32(i32 [[T4]])
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; CHECK-NEXT: [[T5:%.*]] = shl i32 [[T3]], [[NBITS0]]
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; CHECK-NEXT: ret i32 [[T5]]
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;
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%t0 = shl i32 -1, %nbits0
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%t1 = lshr i32 %t0, %nbits0
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%t2 = shl i32 -1, %nbits1
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%t3 = lshr i32 %t0, %nbits1
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%t4 = and i32 %t3, %t1 ; both hands of 'and' could be mask..
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call void @use32(i32 %t0)
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call void @use32(i32 %t1)
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call void @use32(i32 %t2)
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call void @use32(i32 %t3)
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call void @use32(i32 %t4)
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%t5 = shl i32 %t4, %nbits0
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ret i32 %t5
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}
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define i32 @t7_commutativity2(i32 %nbits0, i32 %nbits1) {
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; CHECK-LABEL: @t7_commutativity2(
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; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS0:%.*]]
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; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS0]]
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; CHECK-NEXT: [[T2:%.*]] = shl i32 -1, [[NBITS1:%.*]]
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; CHECK-NEXT: [[T3:%.*]] = lshr i32 [[T0]], [[NBITS1]]
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; CHECK-NEXT: [[T4:%.*]] = and i32 [[T3]], [[T1]]
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; CHECK-NEXT: call void @use32(i32 [[T0]])
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; CHECK-NEXT: call void @use32(i32 [[T1]])
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; CHECK-NEXT: call void @use32(i32 [[T2]])
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; CHECK-NEXT: call void @use32(i32 [[T3]])
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; CHECK-NEXT: call void @use32(i32 [[T4]])
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; CHECK-NEXT: [[T5:%.*]] = shl i32 [[T4]], [[NBITS1]]
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; CHECK-NEXT: ret i32 [[T5]]
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;
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%t0 = shl i32 -1, %nbits0
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%t1 = lshr i32 %t0, %nbits0
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%t2 = shl i32 -1, %nbits1
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%t3 = lshr i32 %t0, %nbits1
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%t4 = and i32 %t3, %t1 ; both hands of 'and' could be mask..
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call void @use32(i32 %t0)
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call void @use32(i32 %t1)
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call void @use32(i32 %t2)
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call void @use32(i32 %t3)
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call void @use32(i32 %t4)
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%t5 = shl i32 %t4, %nbits1
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ret i32 %t5
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}
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; Fast-math flags. We must not preserve them!
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define i32 @t8_nuw(i32 %x, i32 %nbits) {
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; CHECK-LABEL: @t8_nuw(
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; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
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; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]]
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; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]]
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; CHECK-NEXT: call void @use32(i32 [[T0]])
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; CHECK-NEXT: call void @use32(i32 [[T1]])
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; CHECK-NEXT: call void @use32(i32 [[T2]])
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; CHECK-NEXT: [[T3:%.*]] = shl i32 [[X]], [[NBITS]]
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; CHECK-NEXT: ret i32 [[T3]]
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;
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%t0 = shl i32 -1, %nbits
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%t1 = lshr i32 %t0, %nbits
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%t2 = and i32 %t1, %x
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call void @use32(i32 %t0)
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call void @use32(i32 %t1)
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call void @use32(i32 %t2)
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%t3 = shl nuw i32 %t2, %nbits
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ret i32 %t3
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}
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define i32 @t9_nsw(i32 %x, i32 %nbits) {
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; CHECK-LABEL: @t9_nsw(
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; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
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; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]]
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; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]]
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; CHECK-NEXT: call void @use32(i32 [[T0]])
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; CHECK-NEXT: call void @use32(i32 [[T1]])
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; CHECK-NEXT: call void @use32(i32 [[T2]])
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; CHECK-NEXT: [[T3:%.*]] = shl i32 [[X]], [[NBITS]]
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; CHECK-NEXT: ret i32 [[T3]]
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;
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%t0 = shl i32 -1, %nbits
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%t1 = lshr i32 %t0, %nbits
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%t2 = and i32 %t1, %x
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call void @use32(i32 %t0)
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call void @use32(i32 %t1)
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call void @use32(i32 %t2)
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%t3 = shl nsw i32 %t2, %nbits
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ret i32 %t3
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}
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define i32 @t10_nuw_nsw(i32 %x, i32 %nbits) {
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; CHECK-LABEL: @t10_nuw_nsw(
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; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]]
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; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]]
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; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]]
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; CHECK-NEXT: call void @use32(i32 [[T0]])
|
||
|
|
; CHECK-NEXT: call void @use32(i32 [[T1]])
|
||
|
|
; CHECK-NEXT: call void @use32(i32 [[T2]])
|
||
|
|
; CHECK-NEXT: [[T3:%.*]] = shl i32 [[X]], [[NBITS]]
|
||
|
|
; CHECK-NEXT: ret i32 [[T3]]
|
||
|
|
;
|
||
|
|
%t0 = shl i32 -1, %nbits
|
||
|
|
%t1 = lshr i32 %t0, %nbits
|
||
|
|
%t2 = and i32 %t1, %x
|
||
|
|
call void @use32(i32 %t0)
|
||
|
|
call void @use32(i32 %t1)
|
||
|
|
call void @use32(i32 %t2)
|
||
|
|
%t3 = shl nuw nsw i32 %t2, %nbits
|
||
|
|
ret i32 %t3
|
||
|
|
}
|
||
|
|
|
||
|
|
; Special test
|
||
|
|
|
||
|
|
declare void @llvm.assume(i1 %cond)
|
||
|
|
|
||
|
|
; We can't simplify (%shiftnbits-%masknbits) but we have an assumption.
|
||
|
|
define i32 @t11_assume_uge(i32 %x, i32 %masknbits, i32 %shiftnbits) {
|
||
|
|
; CHECK-LABEL: @t11_assume_uge(
|
||
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[SHIFTNBITS:%.*]], [[MASKNBITS:%.*]]
|
||
|
|
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
|
||
|
|
; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[MASKNBITS]]
|
||
|
|
; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[MASKNBITS]]
|
||
|
|
; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]]
|
||
|
|
; CHECK-NEXT: call void @use32(i32 [[T0]])
|
||
|
|
; CHECK-NEXT: call void @use32(i32 [[T1]])
|
||
|
|
; CHECK-NEXT: call void @use32(i32 [[T2]])
|
||
|
|
; CHECK-NEXT: [[T4:%.*]] = shl i32 [[T2]], [[SHIFTNBITS]]
|
||
|
|
; CHECK-NEXT: ret i32 [[T4]]
|
||
|
|
;
|
||
|
|
%cmp = icmp uge i32 %shiftnbits, %masknbits
|
||
|
|
call void @llvm.assume(i1 %cmp)
|
||
|
|
%t0 = shl i32 -1, %masknbits
|
||
|
|
%t1 = lshr i32 %t0, %masknbits
|
||
|
|
%t2 = and i32 %t1, %x
|
||
|
|
call void @use32(i32 %t0)
|
||
|
|
call void @use32(i32 %t1)
|
||
|
|
call void @use32(i32 %t2)
|
||
|
|
%t4 = shl i32 %t2, %shiftnbits
|
||
|
|
ret i32 %t4
|
||
|
|
}
|
||
|
|
|
||
|
|
; Negative tests
|
||
|
|
|
||
|
|
define i32 @n12_different_shamts0(i32 %x, i32 %nbits0, i32 %nbits1) {
|
||
|
|
; CHECK-LABEL: @n12_different_shamts0(
|
||
|
|
; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[NBITS0:%.*]]
|
||
|
|
; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS1:%.*]]
|
||
|
|
; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X]]
|
||
|
|
; CHECK-NEXT: call void @use32(i32 [[T0]])
|
||
|
|
; CHECK-NEXT: call void @use32(i32 [[T1]])
|
||
|
|
; CHECK-NEXT: call void @use32(i32 [[T2]])
|
||
|
|
; CHECK-NEXT: [[T3:%.*]] = shl i32 [[T2]], [[NBITS0]]
|
||
|
|
; CHECK-NEXT: ret i32 [[T3]]
|
||
|
|
;
|
||
|
|
%t0 = shl i32 %x, %nbits0 ; different shift amts
|
||
|
|
%t1 = lshr i32 %t0, %nbits1 ; different shift amts
|
||
|
|
%t2 = and i32 %t1, %x
|
||
|
|
call void @use32(i32 %t0)
|
||
|
|
call void @use32(i32 %t1)
|
||
|
|
call void @use32(i32 %t2)
|
||
|
|
%t3 = shl i32 %t2, %nbits0
|
||
|
|
ret i32 %t3
|
||
|
|
}
|
||
|
|
|
||
|
|
define i32 @n13_different_shamts1(i32 %x, i32 %nbits0, i32 %nbits1) {
|
||
|
|
; CHECK-LABEL: @n13_different_shamts1(
|
||
|
|
; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[NBITS0:%.*]]
|
||
|
|
; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS1:%.*]]
|
||
|
|
; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X]]
|
||
|
|
; CHECK-NEXT: call void @use32(i32 [[T0]])
|
||
|
|
; CHECK-NEXT: call void @use32(i32 [[T1]])
|
||
|
|
; CHECK-NEXT: call void @use32(i32 [[T2]])
|
||
|
|
; CHECK-NEXT: [[T3:%.*]] = shl i32 [[T2]], [[NBITS1]]
|
||
|
|
; CHECK-NEXT: ret i32 [[T3]]
|
||
|
|
;
|
||
|
|
%t0 = shl i32 %x, %nbits0 ; different shift amts
|
||
|
|
%t1 = lshr i32 %t0, %nbits1 ; different shift amts
|
||
|
|
%t2 = and i32 %t1, %x
|
||
|
|
call void @use32(i32 %t0)
|
||
|
|
call void @use32(i32 %t1)
|
||
|
|
call void @use32(i32 %t2)
|
||
|
|
%t3 = shl i32 %t2, %nbits1
|
||
|
|
ret i32 %t3
|
||
|
|
}
|