316 lines
11 KiB
LLVM
316 lines
11 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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target datalayout = "n32:64"
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define void @MainKernel(i32 %iNumSteps, i32 %tid, i32 %base) {
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; CHECK-LABEL: @MainKernel(
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; CHECK-NEXT: [[CALLA:%.*]] = alloca [258 x float], align 4
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; CHECK-NEXT: [[CALLB:%.*]] = alloca [258 x float], align 4
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; CHECK-NEXT: [[CONV_I:%.*]] = uitofp i32 [[INUMSTEPS:%.*]] to float
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; CHECK-NEXT: [[CONV_I12:%.*]] = zext i32 [[TID:%.*]] to i64
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; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [258 x float], [258 x float]* [[CALLA]], i64 0, i64 [[CONV_I12]]
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; CHECK-NEXT: store float [[CONV_I]], float* [[ARRAYIDX3]], align 4
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; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [258 x float], [258 x float]* [[CALLB]], i64 0, i64 [[CONV_I12]]
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; CHECK-NEXT: store float [[CONV_I]], float* [[ARRAYIDX6]], align 4
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; CHECK-NEXT: [[CMP7:%.*]] = icmp eq i32 [[TID]], 0
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; CHECK-NEXT: br i1 [[CMP7]], label [[DOTBB1:%.*]], label [[DOTBB2:%.*]]
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; CHECK: .bb1:
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; CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [258 x float], [258 x float]* [[CALLA]], i64 0, i64 256
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; CHECK-NEXT: store float [[CONV_I]], float* [[ARRAYIDX10]], align 4
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; CHECK-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [258 x float], [258 x float]* [[CALLB]], i64 0, i64 256
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; CHECK-NEXT: store float 0.000000e+00, float* [[ARRAYIDX11]], align 4
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; CHECK-NEXT: br label [[DOTBB2]]
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; CHECK: .bb2:
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; CHECK-NEXT: [[CMP135:%.*]] = icmp sgt i32 [[INUMSTEPS]], 0
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; CHECK-NEXT: br i1 [[CMP135]], label [[DOTBB3:%.*]], label [[DOTBB8:%.*]]
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; CHECK: .bb3:
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; CHECK-NEXT: [[TMP1:%.*]] = phi float [ [[TMP10:%.*]], [[DOTBB12:%.*]] ], [ [[CONV_I]], [[DOTBB2]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = phi float [ [[TMP11:%.*]], [[DOTBB12]] ], [ [[CONV_I]], [[DOTBB2]] ]
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; CHECK-NEXT: [[I12_06:%.*]] = phi i32 [ [[SUB:%.*]], [[DOTBB12]] ], [ [[INUMSTEPS]], [[DOTBB2]] ]
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; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i32 [[I12_06]], [[BASE:%.*]]
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[I12_06]], 1
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; CHECK-NEXT: [[CONV_I9:%.*]] = sext i32 [[ADD]] to i64
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; CHECK-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds [258 x float], [258 x float]* [[CALLA]], i64 0, i64 [[CONV_I9]]
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; CHECK-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds [258 x float], [258 x float]* [[CALLB]], i64 0, i64 [[CONV_I9]]
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; CHECK-NEXT: [[CMP40:%.*]] = icmp ult i32 [[I12_06]], [[BASE]]
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; CHECK-NEXT: br i1 [[TMP3]], label [[DOTBB4:%.*]], label [[DOTBB5:%.*]]
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; CHECK: .bb4:
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; CHECK-NEXT: [[TMP4:%.*]] = load float, float* [[ARRAYIDX20]], align 4
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; CHECK-NEXT: [[TMP5:%.*]] = load float, float* [[ARRAYIDX24]], align 4
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; CHECK-NEXT: [[ADD33:%.*]] = fadd float [[TMP5]], [[TMP4]]
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; CHECK-NEXT: [[ADD33_1:%.*]] = fadd float [[ADD33]], [[TMP1]]
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; CHECK-NEXT: [[ADD33_2:%.*]] = fadd float [[ADD33_1]], [[TMP2]]
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; CHECK-NEXT: br label [[DOTBB5]]
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; CHECK: .bb5:
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; CHECK-NEXT: [[TMP6:%.*]] = phi float [ [[ADD33_1]], [[DOTBB4]] ], [ [[TMP1]], [[DOTBB3]] ]
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; CHECK-NEXT: [[TMP7:%.*]] = phi float [ [[ADD33_2]], [[DOTBB4]] ], [ [[TMP2]], [[DOTBB3]] ]
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; CHECK-NEXT: br i1 [[CMP40]], label [[DOTBB6:%.*]], label [[DOTBB7:%.*]]
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; CHECK: .bb6:
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; CHECK-NEXT: store float [[TMP7]], float* [[ARRAYIDX3]], align 4
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; CHECK-NEXT: store float [[TMP6]], float* [[ARRAYIDX6]], align 4
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; CHECK-NEXT: br label [[DOTBB7]]
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; CHECK: .bb7:
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; CHECK-NEXT: br i1 [[TMP3]], label [[DOTBB9:%.*]], label [[DOTBB10:%.*]]
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; CHECK: .bb8:
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; CHECK-NEXT: ret void
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; CHECK: .bb9:
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; CHECK-NEXT: [[TMP8:%.*]] = load float, float* [[ARRAYIDX20]], align 4
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; CHECK-NEXT: [[TMP9:%.*]] = load float, float* [[ARRAYIDX24]], align 4
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; CHECK-NEXT: [[ADD33_112:%.*]] = fadd float [[TMP9]], [[TMP8]]
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; CHECK-NEXT: [[ADD33_1_1:%.*]] = fadd float [[ADD33_112]], [[TMP6]]
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; CHECK-NEXT: [[ADD33_2_1:%.*]] = fadd float [[ADD33_1_1]], [[TMP7]]
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; CHECK-NEXT: br label [[DOTBB10]]
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; CHECK: .bb10:
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; CHECK-NEXT: [[TMP10]] = phi float [ [[ADD33_1_1]], [[DOTBB9]] ], [ [[TMP6]], [[DOTBB7]] ]
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; CHECK-NEXT: [[TMP11]] = phi float [ [[ADD33_2_1]], [[DOTBB9]] ], [ [[TMP7]], [[DOTBB7]] ]
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; CHECK-NEXT: br i1 [[CMP40]], label [[DOTBB11:%.*]], label [[DOTBB12]]
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; CHECK: .bb11:
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; CHECK-NEXT: store float [[TMP11]], float* [[ARRAYIDX3]], align 4
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; CHECK-NEXT: store float [[TMP10]], float* [[ARRAYIDX6]], align 4
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; CHECK-NEXT: br label [[DOTBB12]]
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; CHECK: .bb12:
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; CHECK-NEXT: [[SUB]] = add i32 [[I12_06]], -4
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; CHECK-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[SUB]], 0
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; CHECK-NEXT: br i1 [[CMP13]], label [[DOTBB3]], label [[DOTBB8]]
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;
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%callA = alloca [258 x float], align 4
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%callB = alloca [258 x float], align 4
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%conv.i = uitofp i32 %iNumSteps to float
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%1 = bitcast float %conv.i to i32
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%conv.i12 = zext i32 %tid to i64
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%arrayidx3 = getelementptr inbounds [258 x float], [258 x float]* %callA, i64 0, i64 %conv.i12
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%2 = bitcast float* %arrayidx3 to i32*
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store i32 %1, i32* %2, align 4
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%arrayidx6 = getelementptr inbounds [258 x float], [258 x float]* %callB, i64 0, i64 %conv.i12
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%3 = bitcast float* %arrayidx6 to i32*
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store i32 %1, i32* %3, align 4
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%cmp7 = icmp eq i32 %tid, 0
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br i1 %cmp7, label %.bb1, label %.bb2
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.bb1:
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%arrayidx10 = getelementptr inbounds [258 x float], [258 x float]* %callA, i64 0, i64 256
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store float %conv.i, float* %arrayidx10, align 4
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%arrayidx11 = getelementptr inbounds [258 x float], [258 x float]* %callB, i64 0, i64 256
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store float 0.000000e+00, float* %arrayidx11, align 4
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br label %.bb2
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.bb2:
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%cmp135 = icmp sgt i32 %iNumSteps, 0
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br i1 %cmp135, label %.bb3, label %.bb8
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.bb3:
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%rA.sroa.8.0 = phi i32 [ %rA.sroa.8.2, %.bb12 ], [ %1, %.bb2 ]
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%rA.sroa.0.0 = phi i32 [ %rA.sroa.0.2, %.bb12 ], [ %1, %.bb2 ]
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%i12.06 = phi i32 [ %sub, %.bb12 ], [ %iNumSteps, %.bb2 ]
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%4 = icmp ugt i32 %i12.06, %base
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%add = add i32 %i12.06, 1
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%conv.i9 = sext i32 %add to i64
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%arrayidx20 = getelementptr inbounds [258 x float], [258 x float]* %callA, i64 0, i64 %conv.i9
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%5 = bitcast float* %arrayidx20 to i32*
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%arrayidx24 = getelementptr inbounds [258 x float], [258 x float]* %callB, i64 0, i64 %conv.i9
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%6 = bitcast float* %arrayidx24 to i32*
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%cmp40 = icmp ult i32 %i12.06, %base
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br i1 %4, label %.bb4, label %.bb5
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.bb4:
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%7 = load i32, i32* %5, align 4
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%8 = load i32, i32* %6, align 4
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%9 = bitcast i32 %8 to float
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%10 = bitcast i32 %7 to float
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%add33 = fadd float %9, %10
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%11 = bitcast i32 %rA.sroa.8.0 to float
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%add33.1 = fadd float %add33, %11
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%12 = bitcast float %add33.1 to i32
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%13 = bitcast i32 %rA.sroa.0.0 to float
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%add33.2 = fadd float %add33.1, %13
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%14 = bitcast float %add33.2 to i32
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br label %.bb5
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.bb5:
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%rA.sroa.8.1 = phi i32 [ %12, %.bb4 ], [ %rA.sroa.8.0, %.bb3 ]
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%rA.sroa.0.1 = phi i32 [ %14, %.bb4 ], [ %rA.sroa.0.0, %.bb3 ]
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br i1 %cmp40, label %.bb6, label %.bb7
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.bb6:
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store i32 %rA.sroa.0.1, i32* %2, align 4
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store i32 %rA.sroa.8.1, i32* %3, align 4
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br label %.bb7
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.bb7:
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br i1 %4, label %.bb9, label %.bb10
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.bb8:
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ret void
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.bb9:
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%15 = load i32, i32* %5, align 4
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%16 = load i32, i32* %6, align 4
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%17 = bitcast i32 %16 to float
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%18 = bitcast i32 %15 to float
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%add33.112 = fadd float %17, %18
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%19 = bitcast i32 %rA.sroa.8.1 to float
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%add33.1.1 = fadd float %add33.112, %19
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%20 = bitcast float %add33.1.1 to i32
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%21 = bitcast i32 %rA.sroa.0.1 to float
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%add33.2.1 = fadd float %add33.1.1, %21
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%22 = bitcast float %add33.2.1 to i32
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br label %.bb10
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.bb10:
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%rA.sroa.8.2 = phi i32 [ %20, %.bb9 ], [ %rA.sroa.8.1, %.bb7 ]
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%rA.sroa.0.2 = phi i32 [ %22, %.bb9 ], [ %rA.sroa.0.1, %.bb7 ]
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br i1 %cmp40, label %.bb11, label %.bb12
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.bb11:
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store i32 %rA.sroa.0.2, i32* %2, align 4
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store i32 %rA.sroa.8.2, i32* %3, align 4
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br label %.bb12
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.bb12:
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%sub = add i32 %i12.06, -4
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%cmp13 = icmp sgt i32 %sub, 0
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br i1 %cmp13, label %.bb3, label %.bb8
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}
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declare i32 @get_i32()
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declare i3 @get_i3()
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declare void @bar()
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define i37 @zext_from_legal_to_illegal_type(i32 %x) {
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; CHECK-LABEL: @zext_from_legal_to_illegal_type(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 42
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; CHECK-NEXT: br i1 [[CMP]], label [[T:%.*]], label [[F:%.*]]
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; CHECK: t:
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; CHECK-NEXT: [[Y:%.*]] = call i32 @get_i32()
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: f:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[P:%.*]] = phi i32 [ [[Y]], [[T]] ], [ 3, [[F]] ]
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; CHECK-NEXT: [[R:%.*]] = zext i32 [[P]] to i37
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; CHECK-NEXT: ret i37 [[R]]
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;
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entry:
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%cmp = icmp eq i32 %x, 42
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br i1 %cmp, label %t, label %f
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t:
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%y = call i32 @get_i32()
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br label %exit
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f:
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call void @bar()
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br label %exit
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exit:
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%p = phi i32 [ %y, %t ], [ 3, %f ]
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%r = zext i32 %p to i37
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ret i37 %r
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}
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define i37 @zext_from_illegal_to_illegal_type(i32 %x) {
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; CHECK-LABEL: @zext_from_illegal_to_illegal_type(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 42
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; CHECK-NEXT: br i1 [[CMP]], label [[T:%.*]], label [[F:%.*]]
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; CHECK: t:
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; CHECK-NEXT: [[Y:%.*]] = call i3 @get_i3()
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: f:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[P:%.*]] = phi i3 [ [[Y]], [[T]] ], [ 3, [[F]] ]
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; CHECK-NEXT: [[R:%.*]] = zext i3 [[P]] to i37
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; CHECK-NEXT: ret i37 [[R]]
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;
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entry:
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%cmp = icmp eq i32 %x, 42
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br i1 %cmp, label %t, label %f
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t:
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%y = call i3 @get_i3()
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br label %exit
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f:
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call void @bar()
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br label %exit
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exit:
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%p = phi i3 [ %y, %t ], [ 3, %f ]
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%r = zext i3 %p to i37
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ret i37 %r
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}
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define i64 @zext_from_legal_to_legal_type(i32 %x) {
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; CHECK-LABEL: @zext_from_legal_to_legal_type(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 42
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; CHECK-NEXT: br i1 [[CMP]], label [[T:%.*]], label [[F:%.*]]
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; CHECK: t:
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; CHECK-NEXT: [[Y:%.*]] = call i32 @get_i32()
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; CHECK-NEXT: [[PHITMP:%.*]] = zext i32 [[Y]] to i64
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; CHECK-NEXT: br label [[EXIT:%.*]]
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; CHECK: f:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[P:%.*]] = phi i64 [ [[PHITMP]], [[T]] ], [ 3, [[F]] ]
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; CHECK-NEXT: ret i64 [[P]]
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;
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entry:
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%cmp = icmp eq i32 %x, 42
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br i1 %cmp, label %t, label %f
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t:
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%y = call i32 @get_i32()
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br label %exit
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f:
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call void @bar()
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br label %exit
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exit:
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%p = phi i32 [ %y, %t ], [ 3, %f ]
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%r = zext i32 %p to i64
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ret i64 %r
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}
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define i64 @zext_from_illegal_to_legal_type(i32 %x) {
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; CHECK-LABEL: @zext_from_illegal_to_legal_type(
|
||
|
|
; CHECK-NEXT: entry:
|
||
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 42
|
||
|
|
; CHECK-NEXT: br i1 [[CMP]], label [[T:%.*]], label [[F:%.*]]
|
||
|
|
; CHECK: t:
|
||
|
|
; CHECK-NEXT: [[Y:%.*]] = call i3 @get_i3()
|
||
|
|
; CHECK-NEXT: [[PHITMP:%.*]] = zext i3 [[Y]] to i64
|
||
|
|
; CHECK-NEXT: br label [[EXIT:%.*]]
|
||
|
|
; CHECK: f:
|
||
|
|
; CHECK-NEXT: call void @bar()
|
||
|
|
; CHECK-NEXT: br label [[EXIT]]
|
||
|
|
; CHECK: exit:
|
||
|
|
; CHECK-NEXT: [[P:%.*]] = phi i64 [ [[PHITMP]], [[T]] ], [ 3, [[F]] ]
|
||
|
|
; CHECK-NEXT: ret i64 [[P]]
|
||
|
|
;
|
||
|
|
entry:
|
||
|
|
%cmp = icmp eq i32 %x, 42
|
||
|
|
br i1 %cmp, label %t, label %f
|
||
|
|
|
||
|
|
t:
|
||
|
|
%y = call i3 @get_i3()
|
||
|
|
br label %exit
|
||
|
|
|
||
|
|
f:
|
||
|
|
call void @bar()
|
||
|
|
br label %exit
|
||
|
|
|
||
|
|
exit:
|
||
|
|
%p = phi i3 [ %y, %t ], [ 3, %f ]
|
||
|
|
%r = zext i3 %p to i64
|
||
|
|
ret i64 %r
|
||
|
|
}
|