235 lines
7.5 KiB
LLVM
235 lines
7.5 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; https://bugs.llvm.org/show_bug.cgi?id=38149
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; Pattern:
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; ((%x << MaskedBits) a>> MaskedBits) == %x
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; Should be transformed into:
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; (add %x, (1 << (KeptBits-1))) u< (1 << KeptBits)
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; Where KeptBits = bitwidth(%x) - MaskedBits
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; ============================================================================ ;
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; Basic positive tests
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; ============================================================================ ;
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define i1 @p0(i8 %x) {
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; CHECK-LABEL: @p0(
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; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X:%.*]], 4
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 8
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%tmp0 = shl i8 %x, 5
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%tmp1 = ashr exact i8 %tmp0, 5
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%tmp2 = icmp eq i8 %tmp1, %x
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ret i1 %tmp2
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}
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; Big unusual bit width, https://bugs.llvm.org/show_bug.cgi?id=38204
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define i1 @pb(i65 %x) {
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; CHECK-LABEL: @pb(
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; CHECK-NEXT: [[TMP1:%.*]] = add i65 [[X:%.*]], 9223372036854775808
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; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i65 [[TMP1]], -1
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%tmp0 = shl i65 %x, 1
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%tmp1 = ashr exact i65 %tmp0, 1
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%tmp2 = icmp eq i65 %x, %tmp1
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ret i1 %tmp2
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}
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; ============================================================================ ;
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; Vector tests
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; ============================================================================ ;
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define <2 x i1> @p1_vec_splat(<2 x i8> %x) {
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; CHECK-LABEL: @p1_vec_splat(
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; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i8> [[X:%.*]], <i8 4, i8 4>
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ult <2 x i8> [[TMP1]], <i8 8, i8 8>
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; CHECK-NEXT: ret <2 x i1> [[TMP2]]
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;
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%tmp0 = shl <2 x i8> %x, <i8 5, i8 5>
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%tmp1 = ashr exact <2 x i8> %tmp0, <i8 5, i8 5>
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%tmp2 = icmp eq <2 x i8> %tmp1, %x
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ret <2 x i1> %tmp2
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}
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define <2 x i1> @p2_vec_nonsplat(<2 x i8> %x) {
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; CHECK-LABEL: @p2_vec_nonsplat(
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; CHECK-NEXT: [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], <i8 5, i8 6>
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; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], <i8 5, i8 6>
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i8> [[TMP1]], [[X]]
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; CHECK-NEXT: ret <2 x i1> [[TMP2]]
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;
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%tmp0 = shl <2 x i8> %x, <i8 5, i8 6>
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%tmp1 = ashr exact <2 x i8> %tmp0, <i8 5, i8 6>
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%tmp2 = icmp eq <2 x i8> %tmp1, %x
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ret <2 x i1> %tmp2
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}
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define <3 x i1> @p3_vec_undef0(<3 x i8> %x) {
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; CHECK-LABEL: @p3_vec_undef0(
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; CHECK-NEXT: [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], <i8 5, i8 undef, i8 5>
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; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 5, i8 5>
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <3 x i8> [[TMP1]], [[X]]
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; CHECK-NEXT: ret <3 x i1> [[TMP2]]
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;
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%tmp0 = shl <3 x i8> %x, <i8 5, i8 undef, i8 5>
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%tmp1 = ashr exact <3 x i8> %tmp0, <i8 5, i8 5, i8 5>
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%tmp2 = icmp eq <3 x i8> %tmp1, %x
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ret <3 x i1> %tmp2
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}
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define <3 x i1> @p4_vec_undef1(<3 x i8> %x) {
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; CHECK-LABEL: @p4_vec_undef1(
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; CHECK-NEXT: [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], <i8 5, i8 5, i8 5>
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; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 undef, i8 5>
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <3 x i8> [[TMP1]], [[X]]
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; CHECK-NEXT: ret <3 x i1> [[TMP2]]
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;
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%tmp0 = shl <3 x i8> %x, <i8 5, i8 5, i8 5>
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%tmp1 = ashr exact <3 x i8> %tmp0, <i8 5, i8 undef, i8 5>
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%tmp2 = icmp eq <3 x i8> %tmp1, %x
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ret <3 x i1> %tmp2
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}
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define <3 x i1> @p5_vec_undef2(<3 x i8> %x) {
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; CHECK-LABEL: @p5_vec_undef2(
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; CHECK-NEXT: [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], <i8 5, i8 undef, i8 5>
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; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], <i8 5, i8 undef, i8 5>
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <3 x i8> [[TMP1]], [[X]]
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; CHECK-NEXT: ret <3 x i1> [[TMP2]]
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;
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%tmp0 = shl <3 x i8> %x, <i8 5, i8 undef, i8 5>
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%tmp1 = ashr exact <3 x i8> %tmp0, <i8 5, i8 undef, i8 5>
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%tmp2 = icmp eq <3 x i8> %tmp1, %x
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ret <3 x i1> %tmp2
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}
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; ============================================================================ ;
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; Commutativity tests.
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; ============================================================================ ;
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declare i8 @gen8()
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define i1 @c0() {
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; CHECK-LABEL: @c0(
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; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
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; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X]], 4
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 8
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%x = call i8 @gen8()
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%tmp0 = shl i8 %x, 5
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%tmp1 = ashr exact i8 %tmp0, 5
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%tmp2 = icmp eq i8 %x, %tmp1 ; swapped order
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ret i1 %tmp2
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}
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; ============================================================================ ;
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; One-use tests.
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; ============================================================================ ;
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declare void @use8(i8)
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define i1 @n_oneuse0(i8 %x) {
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; CHECK-LABEL: @n_oneuse0(
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; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
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; CHECK-NEXT: call void @use8(i8 [[TMP0]])
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; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[X]], 4
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], 8
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%tmp0 = shl i8 %x, 5
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call void @use8(i8 %tmp0)
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%tmp1 = ashr exact i8 %tmp0, 5
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%tmp2 = icmp eq i8 %tmp1, %x
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ret i1 %tmp2
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}
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define i1 @n_oneuse1(i8 %x) {
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; CHECK-LABEL: @n_oneuse1(
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; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
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; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
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; CHECK-NEXT: call void @use8(i8 [[TMP1]])
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], [[X]]
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%tmp0 = shl i8 %x, 5
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%tmp1 = ashr exact i8 %tmp0, 5
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call void @use8(i8 %tmp1)
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%tmp2 = icmp eq i8 %tmp1, %x
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ret i1 %tmp2
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}
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define i1 @n_oneuse2(i8 %x) {
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; CHECK-LABEL: @n_oneuse2(
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; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
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; CHECK-NEXT: call void @use8(i8 [[TMP0]])
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; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
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; CHECK-NEXT: call void @use8(i8 [[TMP1]])
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], [[X]]
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%tmp0 = shl i8 %x, 5
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call void @use8(i8 %tmp0)
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%tmp1 = ashr exact i8 %tmp0, 5
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call void @use8(i8 %tmp1)
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%tmp2 = icmp eq i8 %tmp1, %x
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ret i1 %tmp2
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}
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; ============================================================================ ;
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; Negative tests
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; ============================================================================ ;
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define i1 @n0(i8 %x) {
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; CHECK-LABEL: @n0(
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; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
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; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 3
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], [[X]]
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%tmp0 = shl i8 %x, 5
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%tmp1 = ashr exact i8 %tmp0, 3 ; not 5
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%tmp2 = icmp eq i8 %tmp1, %x
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ret i1 %tmp2
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}
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define i1 @n1(i8 %x) {
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; CHECK-LABEL: @n1(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i8 [[X:%.*]], 8
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; CHECK-NEXT: ret i1 [[TMP1]]
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;
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%tmp0 = shl i8 %x, 5
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%tmp1 = lshr exact i8 %tmp0, 5 ; not ashr
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%tmp2 = icmp eq i8 %tmp1, %x
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ret i1 %tmp2
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}
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define i1 @n2(i8 %x, i8 %y) {
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; CHECK-LABEL: @n2(
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; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5
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; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], [[Y:%.*]]
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%tmp0 = shl i8 %x, 5
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%tmp1 = ashr exact i8 %tmp0, 5
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%tmp2 = icmp eq i8 %tmp1, %y ; not %x
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ret i1 %tmp2
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}
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define <2 x i1> @n3_vec_nonsplat(<2 x i8> %x) {
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; CHECK-LABEL: @n3_vec_nonsplat(
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; CHECK-NEXT: [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], <i8 5, i8 5>
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; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], <i8 5, i8 3>
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; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i8> [[TMP1]], [[X]]
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; CHECK-NEXT: ret <2 x i1> [[TMP2]]
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;
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%tmp0 = shl <2 x i8> %x, <i8 5, i8 5>
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%tmp1 = ashr exact <2 x i8> %tmp0, <i8 5, i8 3> ; 3 instead of 5
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%tmp2 = icmp eq <2 x i8> %tmp1, %x
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ret <2 x i1> %tmp2
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}
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