299 lines
9.2 KiB
LLVM
299 lines
9.2 KiB
LLVM
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; RUN: opt -instcombine -S -o - %s | FileCheck %s
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; Check that we can replace `atomicrmw <op> LHS, 0` with `load atomic LHS`.
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; This is possible when:
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; - <op> LHS, 0 == LHS
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; - the ordering of atomicrmw is compatible with a load (i.e., no release semantic)
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; CHECK-LABEL: atomic_add_zero
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; CHECK-NEXT: %res = load atomic i32, i32* %addr monotonic, align 4
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; CHECK-NEXT: ret i32 %res
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define i32 @atomic_add_zero(i32* %addr) {
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%res = atomicrmw add i32* %addr, i32 0 monotonic
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ret i32 %res
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}
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; CHECK-LABEL: atomic_or_zero
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; CHECK-NEXT: %res = load atomic i32, i32* %addr monotonic, align 4
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; CHECK-NEXT: ret i32 %res
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define i32 @atomic_or_zero(i32* %addr) {
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%res = atomicrmw add i32* %addr, i32 0 monotonic
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ret i32 %res
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}
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; CHECK-LABEL: atomic_sub_zero
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; CHECK-NEXT: %res = load atomic i32, i32* %addr monotonic, align 4
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; CHECK-NEXT: ret i32 %res
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define i32 @atomic_sub_zero(i32* %addr) {
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%res = atomicrmw sub i32* %addr, i32 0 monotonic
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ret i32 %res
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}
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; CHECK-LABEL: atomic_and_allones
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; CHECK-NEXT: %res = load atomic i32, i32* %addr monotonic, align 4
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; CHECK-NEXT: ret i32 %res
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define i32 @atomic_and_allones(i32* %addr) {
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%res = atomicrmw and i32* %addr, i32 -1 monotonic
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ret i32 %res
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}
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; CHECK-LABEL: atomic_umin_uint_max
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; CHECK-NEXT: %res = load atomic i32, i32* %addr monotonic, align 4
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; CHECK-NEXT: ret i32 %res
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define i32 @atomic_umin_uint_max(i32* %addr) {
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%res = atomicrmw umin i32* %addr, i32 -1 monotonic
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ret i32 %res
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}
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; CHECK-LABEL: atomic_umax_zero
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; CHECK-NEXT: %res = load atomic i32, i32* %addr monotonic, align 4
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; CHECK-NEXT: ret i32 %res
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define i32 @atomic_umax_zero(i32* %addr) {
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%res = atomicrmw umax i32* %addr, i32 0 monotonic
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ret i32 %res
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}
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; CHECK-LABEL: atomic_min_smax_char
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; CHECK-NEXT: %res = load atomic i8, i8* %addr monotonic, align 1
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; CHECK-NEXT: ret i8 %res
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define i8 @atomic_min_smax_char(i8* %addr) {
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%res = atomicrmw min i8* %addr, i8 127 monotonic
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ret i8 %res
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}
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; CHECK-LABEL: atomic_max_smin_char
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; CHECK-NEXT: %res = load atomic i8, i8* %addr monotonic, align 1
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; CHECK-NEXT: ret i8 %res
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define i8 @atomic_max_smin_char(i8* %addr) {
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%res = atomicrmw max i8* %addr, i8 -128 monotonic
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ret i8 %res
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}
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; CHECK-LABEL: atomic_fsub
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; CHECK-NEXT: %res = load atomic float, float* %addr monotonic, align 4
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; CHECK-NEXT: ret float %res
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define float @atomic_fsub_zero(float* %addr) {
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%res = atomicrmw fsub float* %addr, float 0.0 monotonic
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ret float %res
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}
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; CHECK-LABEL: atomic_fadd
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; CHECK-NEXT: %res = load atomic float, float* %addr monotonic, align 4
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; CHECK-NEXT: ret float %res
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define float @atomic_fadd_zero(float* %addr) {
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%res = atomicrmw fadd float* %addr, float -0.0 monotonic
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ret float %res
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}
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; CHECK-LABEL: atomic_fsub_canon
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; CHECK-NEXT: %res = atomicrmw fadd float* %addr, float -0.000000e+00 release
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; CHECK-NEXT: ret float %res
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define float @atomic_fsub_canon(float* %addr) {
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%res = atomicrmw fsub float* %addr, float 0.0 release
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ret float %res
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}
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; CHECK-LABEL: atomic_fadd_canon
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; CHECK-NEXT: %res = atomicrmw fadd float* %addr, float -0.000000e+00 release
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; CHECK-NEXT: ret float %res
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define float @atomic_fadd_canon(float* %addr) {
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%res = atomicrmw fadd float* %addr, float -0.0 release
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ret float %res
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}
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; Can't replace a volatile w/a load; this would eliminate a volatile store.
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; CHECK-LABEL: atomic_sub_zero_volatile
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; CHECK-NEXT: %res = atomicrmw volatile sub i64* %addr, i64 0 acquire
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; CHECK-NEXT: ret i64 %res
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define i64 @atomic_sub_zero_volatile(i64* %addr) {
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%res = atomicrmw volatile sub i64* %addr, i64 0 acquire
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ret i64 %res
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}
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; Check that the transformation properly preserve the syncscope.
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; CHECK-LABEL: atomic_syncscope
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; CHECK-NEXT: %res = load atomic i16, i16* %addr syncscope("some_syncscope") acquire, align 2
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; CHECK-NEXT: ret i16 %res
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define i16 @atomic_syncscope(i16* %addr) {
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%res = atomicrmw or i16* %addr, i16 0 syncscope("some_syncscope") acquire
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ret i16 %res
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}
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; By eliminating the store part of the atomicrmw, we would get rid of the
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; release semantic, which is incorrect. We can canonicalize the operation.
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; CHECK-LABEL: atomic_seq_cst
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; CHECK-NEXT: %res = atomicrmw or i16* %addr, i16 0 seq_cst
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; CHECK-NEXT: ret i16 %res
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define i16 @atomic_seq_cst(i16* %addr) {
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%res = atomicrmw add i16* %addr, i16 0 seq_cst
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ret i16 %res
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}
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; Check that the transformation does not apply when the value is changed by
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; the atomic operation (non zero constant).
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; CHECK-LABEL: atomic_add_non_zero
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; CHECK-NEXT: %res = atomicrmw add i16* %addr, i16 2 monotonic
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; CHECK-NEXT: ret i16 %res
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define i16 @atomic_add_non_zero(i16* %addr) {
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%res = atomicrmw add i16* %addr, i16 2 monotonic
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ret i16 %res
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}
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; CHECK-LABEL: atomic_xor_zero
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; CHECK-NEXT: %res = load atomic i16, i16* %addr monotonic, align 2
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; CHECK-NEXT: ret i16 %res
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define i16 @atomic_xor_zero(i16* %addr) {
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%res = atomicrmw xor i16* %addr, i16 0 monotonic
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ret i16 %res
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}
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; Check that the transformation does not apply when the ordering is
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; incompatible with a load (release). Do canonicalize.
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; CHECK-LABEL: atomic_release
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; CHECK-NEXT: %res = atomicrmw or i16* %addr, i16 0 release
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; CHECK-NEXT: ret i16 %res
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define i16 @atomic_release(i16* %addr) {
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%res = atomicrmw sub i16* %addr, i16 0 release
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ret i16 %res
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}
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; Check that the transformation does not apply when the ordering is
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; incompatible with a load (acquire, release). Do canonicalize.
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; CHECK-LABEL: atomic_acq_rel
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; CHECK-NEXT: %res = atomicrmw or i16* %addr, i16 0 acq_rel
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; CHECK-NEXT: ret i16 %res
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define i16 @atomic_acq_rel(i16* %addr) {
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%res = atomicrmw xor i16* %addr, i16 0 acq_rel
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ret i16 %res
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}
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; CHECK-LABEL: sat_or_allones
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; CHECK-NEXT: %res = atomicrmw xchg i32* %addr, i32 -1 monotonic
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; CHECK-NEXT: ret i32 %res
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define i32 @sat_or_allones(i32* %addr) {
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%res = atomicrmw or i32* %addr, i32 -1 monotonic
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ret i32 %res
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}
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; CHECK-LABEL: sat_and_zero
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; CHECK-NEXT: %res = atomicrmw xchg i32* %addr, i32 0 monotonic
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; CHECK-NEXT: ret i32 %res
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define i32 @sat_and_zero(i32* %addr) {
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%res = atomicrmw and i32* %addr, i32 0 monotonic
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ret i32 %res
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}
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; CHECK-LABEL: sat_umin_uint_min
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; CHECK-NEXT: %res = atomicrmw xchg i32* %addr, i32 0 monotonic
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; CHECK-NEXT: ret i32 %res
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define i32 @sat_umin_uint_min(i32* %addr) {
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%res = atomicrmw umin i32* %addr, i32 0 monotonic
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ret i32 %res
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}
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; CHECK-LABEL: sat_umax_uint_max
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; CHECK-NEXT: %res = atomicrmw xchg i32* %addr, i32 -1 monotonic
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; CHECK-NEXT: ret i32 %res
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define i32 @sat_umax_uint_max(i32* %addr) {
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%res = atomicrmw umax i32* %addr, i32 -1 monotonic
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ret i32 %res
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}
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; CHECK-LABEL: sat_min_smin_char
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; CHECK-NEXT: %res = atomicrmw xchg i8* %addr, i8 -128 monotonic
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; CHECK-NEXT: ret i8 %res
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define i8 @sat_min_smin_char(i8* %addr) {
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%res = atomicrmw min i8* %addr, i8 -128 monotonic
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ret i8 %res
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}
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; CHECK-LABEL: sat_max_smax_char
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; CHECK-NEXT: %res = atomicrmw xchg i8* %addr, i8 127 monotonic
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; CHECK-NEXT: ret i8 %res
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define i8 @sat_max_smax_char(i8* %addr) {
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%res = atomicrmw max i8* %addr, i8 127 monotonic
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ret i8 %res
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}
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; CHECK-LABEL: sat_fadd_nan
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; CHECK-NEXT: %res = atomicrmw xchg double* %addr, double 0x7FF00000FFFFFFFF release
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; CHECK-NEXT: ret double %res
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define double @sat_fadd_nan(double* %addr) {
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%res = atomicrmw fadd double* %addr, double 0x7FF00000FFFFFFFF release
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ret double %res
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}
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; CHECK-LABEL: sat_fsub_nan
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; CHECK-NEXT: %res = atomicrmw xchg double* %addr, double 0x7FF00000FFFFFFFF release
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; CHECK-NEXT: ret double %res
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define double @sat_fsub_nan(double* %addr) {
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%res = atomicrmw fsub double* %addr, double 0x7FF00000FFFFFFFF release
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ret double %res
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}
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; CHECK-LABEL: sat_fsub_nan_unused
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; CHECK-NEXT: store atomic double 0x7FF00000FFFFFFFF, double* %addr monotonic, align 8
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; CHECK-NEXT: ret void
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define void @sat_fsub_nan_unused(double* %addr) {
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atomicrmw fsub double* %addr, double 0x7FF00000FFFFFFFF monotonic
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ret void
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}
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; CHECK-LABEL: xchg_unused_monotonic
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; CHECK-NEXT: store atomic i32 0, i32* %addr monotonic, align 4
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; CHECK-NEXT: ret void
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define void @xchg_unused_monotonic(i32* %addr) {
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atomicrmw xchg i32* %addr, i32 0 monotonic
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ret void
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}
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; CHECK-LABEL: xchg_unused_release
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; CHECK-NEXT: store atomic i32 -1, i32* %addr release, align 4
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; CHECK-NEXT: ret void
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define void @xchg_unused_release(i32* %addr) {
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atomicrmw xchg i32* %addr, i32 -1 release
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ret void
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}
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; CHECK-LABEL: xchg_unused_seq_cst
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; CHECK-NEXT: atomicrmw xchg i32* %addr, i32 0 seq_cst
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; CHECK-NEXT: ret void
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define void @xchg_unused_seq_cst(i32* %addr) {
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atomicrmw xchg i32* %addr, i32 0 seq_cst
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ret void
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}
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; CHECK-LABEL: xchg_unused_volatile
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; CHECK-NEXT: atomicrmw volatile xchg i32* %addr, i32 0 monotonic
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; CHECK-NEXT: ret void
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define void @xchg_unused_volatile(i32* %addr) {
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atomicrmw volatile xchg i32* %addr, i32 0 monotonic
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ret void
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}
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; CHECK-LABEL: sat_or_allones_unused
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; CHECK-NEXT: store atomic i32 -1, i32* %addr monotonic, align 4
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; CHECK-NEXT: ret void
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define void @sat_or_allones_unused(i32* %addr) {
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atomicrmw or i32* %addr, i32 -1 monotonic
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ret void
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}
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; CHECK-LABEL: undef_operand_unused
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; CHECK-NEXT: atomicrmw or i32* %addr, i32 undef monotonic
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; CHECK-NEXT: ret void
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define void @undef_operand_unused(i32* %addr) {
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atomicrmw or i32* %addr, i32 undef monotonic
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ret void
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}
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; CHECK-LABEL: undef_operand_used
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; CHECK-NEXT: %res = atomicrmw or i32* %addr, i32 undef monotonic
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; CHECK-NEXT: ret i32 %res
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define i32 @undef_operand_used(i32* %addr) {
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%res = atomicrmw or i32* %addr, i32 undef monotonic
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ret i32 %res
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}
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