llvm-for-llvmta/test/Transforms/InstCombine/CPP_min_max.ll

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2022-04-25 10:02:23 +02:00
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
; This testcase corresponds to PR362, which notices that this horrible code
; is generated by the C++ front-end and LLVM optimizers, which has lots of
; loads and other stuff that are unneeded.
;
; Instcombine should propagate the load through the select instructions to
; allow elimination of the extra stuff by the mem2reg pass.
define void @_Z5test1RiS_(i32* %x, i32* %y) {
; CHECK-LABEL: @_Z5test1RiS_(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP_1_I:%.*]] = load i32, i32* [[Y:%.*]], align 4
; CHECK-NEXT: [[TMP_3_I:%.*]] = load i32, i32* [[X:%.*]], align 4
; CHECK-NEXT: [[TMP_4_I:%.*]] = icmp slt i32 [[TMP_1_I]], [[TMP_3_I]]
; CHECK-NEXT: [[TMP_4:%.*]] = select i1 [[TMP_4_I]], i32 [[TMP_1_I]], i32 [[TMP_3_I]]
; CHECK-NEXT: store i32 [[TMP_4]], i32* [[X]], align 4
; CHECK-NEXT: ret void
;
entry:
%tmp.1.i = load i32, i32* %y ; <i32> [#uses=1]
%tmp.3.i = load i32, i32* %x ; <i32> [#uses=1]
%tmp.4.i = icmp slt i32 %tmp.1.i, %tmp.3.i ; <i1> [#uses=1]
%retval.i = select i1 %tmp.4.i, i32* %y, i32* %x ; <i32*> [#uses=1]
%tmp.4 = load i32, i32* %retval.i ; <i32> [#uses=1]
store i32 %tmp.4, i32* %x
ret void
}
define void @_Z5test2RiS_(i32* %x, i32* %y) {
; CHECK-LABEL: @_Z5test2RiS_(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP_2:%.*]] = load i32, i32* [[X:%.*]], align 4
; CHECK-NEXT: [[TMP_3_I:%.*]] = load i32, i32* [[Y:%.*]], align 4
; CHECK-NEXT: [[TMP_4_I:%.*]] = icmp slt i32 [[TMP_2]], [[TMP_3_I]]
; CHECK-NEXT: [[TMP_6:%.*]] = select i1 [[TMP_4_I]], i32 [[TMP_3_I]], i32 [[TMP_2]]
; CHECK-NEXT: store i32 [[TMP_6]], i32* [[Y]], align 4
; CHECK-NEXT: ret void
;
entry:
%tmp.0 = alloca i32 ; <i32*> [#uses=2]
%tmp.2 = load i32, i32* %x ; <i32> [#uses=2]
store i32 %tmp.2, i32* %tmp.0
%tmp.3.i = load i32, i32* %y ; <i32> [#uses=1]
%tmp.4.i = icmp slt i32 %tmp.2, %tmp.3.i ; <i1> [#uses=1]
%retval.i = select i1 %tmp.4.i, i32* %y, i32* %tmp.0 ; <i32*> [#uses=1]
%tmp.6 = load i32, i32* %retval.i ; <i32> [#uses=1]
store i32 %tmp.6, i32* %y
ret void
}