64 lines
2.1 KiB
LLVM
64 lines
2.1 KiB
LLVM
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; RUN: opt < %s -indirectbr-expand -S | FileCheck %s
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;
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; REQUIRES: x86-registered-target
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target triple = "x86_64-unknown-linux-gnu"
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@test1.targets = constant [4 x i8*] [i8* blockaddress(@test1, %bb0),
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i8* blockaddress(@test1, %bb1),
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i8* blockaddress(@test1, %bb2),
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i8* blockaddress(@test1, %bb3)]
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; CHECK-LABEL: @test1.targets = constant [4 x i8*]
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; CHECK: [i8* inttoptr (i64 1 to i8*),
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; CHECK: i8* inttoptr (i64 2 to i8*),
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; CHECK: i8* inttoptr (i64 3 to i8*),
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; CHECK: i8* blockaddress(@test1, %bb3)]
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define void @test1(i64* readonly %p, i64* %sink) #0 {
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; CHECK-LABEL: define void @test1(
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entry:
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%i0 = load i64, i64* %p
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%target.i0 = getelementptr [4 x i8*], [4 x i8*]* @test1.targets, i64 0, i64 %i0
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%target0 = load i8*, i8** %target.i0
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; Only a subset of blocks are viable successors here.
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indirectbr i8* %target0, [label %bb0, label %bb1]
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; CHECK-NOT: indirectbr
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; CHECK: %[[ENTRY_V:.*]] = ptrtoint i8* %{{.*}} to i64
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; CHECK-NEXT: br label %[[SWITCH_BB:.*]]
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bb0:
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store volatile i64 0, i64* %sink
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br label %latch
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bb1:
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store volatile i64 1, i64* %sink
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br label %latch
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bb2:
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store volatile i64 2, i64* %sink
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br label %latch
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bb3:
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store volatile i64 3, i64* %sink
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br label %latch
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latch:
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%i.next = load i64, i64* %p
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%target.i.next = getelementptr [4 x i8*], [4 x i8*]* @test1.targets, i64 0, i64 %i.next
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%target.next = load i8*, i8** %target.i.next
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; A different subset of blocks are viable successors here.
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indirectbr i8* %target.next, [label %bb1, label %bb2]
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; CHECK-NOT: indirectbr
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; CHECK: %[[LATCH_V:.*]] = ptrtoint i8* %{{.*}} to i64
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; CHECK-NEXT: br label %[[SWITCH_BB]]
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;
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; CHECK: [[SWITCH_BB]]:
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; CHECK-NEXT: %[[V:.*]] = phi i64 [ %[[ENTRY_V]], %entry ], [ %[[LATCH_V]], %latch ]
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; CHECK-NEXT: switch i64 %[[V]], label %bb0 [
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; CHECK-NEXT: i64 2, label %bb1
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; CHECK-NEXT: i64 3, label %bb2
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; CHECK-NEXT: ]
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}
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attributes #0 = { "target-features"="+retpoline" }
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