330 lines
10 KiB
LLVM
330 lines
10 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -basic-aa -dse -S < %s | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-apple-macosx10.7.0"
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; Sanity tests for atomic stores.
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; Note that it turns out essentially every transformation DSE does is legal on
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; atomic ops, just some transformations are not allowed across release-acquire pairs.
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@x = common global i32 0, align 4
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@y = common global i32 0, align 4
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declare void @randomop(i32*)
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; DSE across unordered store (allowed)
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define void @test1() {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: store atomic i32 0, i32* @y unordered, align 4
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; CHECK-NEXT: store i32 1, i32* @x, align 4
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; CHECK-NEXT: ret void
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;
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store i32 0, i32* @x
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store atomic i32 0, i32* @y unordered, align 4
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store i32 1, i32* @x
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ret void
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}
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; DSE remove unordered store (allowed)
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define void @test4() {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: store i32 1, i32* @x, align 4
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; CHECK-NEXT: ret void
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;
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store atomic i32 0, i32* @x unordered, align 4
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store i32 1, i32* @x
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ret void
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}
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; DSE unordered store overwriting non-atomic store (allowed)
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define void @test5() {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: store atomic i32 1, i32* @x unordered, align 4
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; CHECK-NEXT: ret void
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;
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store i32 0, i32* @x
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store atomic i32 1, i32* @x unordered, align 4
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ret void
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}
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; DSE no-op unordered atomic store (allowed)
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define void @test6() {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: ret void
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;
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%x = load atomic i32, i32* @x unordered, align 4
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store atomic i32 %x, i32* @x unordered, align 4
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ret void
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}
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; DSE seq_cst store (be conservative; DSE doesn't have infrastructure
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; to reason about atomic operations).
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define void @test7() {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
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; CHECK-NEXT: store atomic i32 0, i32* [[A]] seq_cst, align 4
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; CHECK-NEXT: ret void
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;
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%a = alloca i32
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store atomic i32 0, i32* %a seq_cst, align 4
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ret void
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}
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; DSE and seq_cst load (be conservative; DSE doesn't have infrastructure
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; to reason about atomic operations).
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define i32 @test8() {
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; CHECK-LABEL: @test8(
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; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
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; CHECK-NEXT: call void @randomop(i32* [[A]])
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; CHECK-NEXT: store i32 0, i32* [[A]], align 4
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; CHECK-NEXT: [[X:%.*]] = load atomic i32, i32* @x seq_cst, align 4
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; CHECK-NEXT: ret i32 [[X]]
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;
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%a = alloca i32
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call void @randomop(i32* %a)
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store i32 0, i32* %a, align 4
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%x = load atomic i32, i32* @x seq_cst, align 4
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ret i32 %x
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}
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; DSE across monotonic store (allowed as long as the eliminated store isUnordered)
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define void @test10() {
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; CHECK-LABEL: test10
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; CHECK-NOT: store i32 0
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; CHECK: store i32 1
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store i32 0, i32* @x
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store atomic i32 42, i32* @y monotonic, align 4
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store i32 1, i32* @x
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ret void
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}
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; DSE across monotonic load (forbidden since the eliminated store is atomic)
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define i32 @test11() {
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; CHECK-LABEL: @test11(
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; CHECK-NEXT: store atomic i32 0, i32* @x monotonic, align 4
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; CHECK-NEXT: [[X:%.*]] = load atomic i32, i32* @y monotonic, align 4
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; CHECK-NEXT: store atomic i32 1, i32* @x monotonic, align 4
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; CHECK-NEXT: ret i32 [[X]]
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;
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store atomic i32 0, i32* @x monotonic, align 4
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%x = load atomic i32, i32* @y monotonic, align 4
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store atomic i32 1, i32* @x monotonic, align 4
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ret i32 %x
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}
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; DSE across monotonic store (forbidden since the eliminated store is atomic)
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define void @test12() {
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; CHECK-LABEL: @test12(
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; CHECK-NEXT: store atomic i32 0, i32* @x monotonic, align 4
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; CHECK-NEXT: store atomic i32 42, i32* @y monotonic, align 4
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; CHECK-NEXT: store atomic i32 1, i32* @x monotonic, align 4
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; CHECK-NEXT: ret void
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;
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store atomic i32 0, i32* @x monotonic, align 4
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store atomic i32 42, i32* @y monotonic, align 4
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store atomic i32 1, i32* @x monotonic, align 4
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ret void
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}
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; But DSE is not allowed across a release-acquire pair.
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define i32 @test15() {
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; CHECK-LABEL: @test15(
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; CHECK-NEXT: store i32 0, i32* @x, align 4
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; CHECK-NEXT: store atomic i32 0, i32* @y release, align 4
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; CHECK-NEXT: [[X:%.*]] = load atomic i32, i32* @y acquire, align 4
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; CHECK-NEXT: store i32 1, i32* @x, align 4
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; CHECK-NEXT: ret i32 [[X]]
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;
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store i32 0, i32* @x
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store atomic i32 0, i32* @y release, align 4
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%x = load atomic i32, i32* @y acquire, align 4
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store i32 1, i32* @x
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ret i32 %x
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}
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@z = common global i64 0, align 4
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@a = common global i64 0, align 4
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; Be conservative, do not kill regular store.
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define i64 @test_atomicrmw_0() {
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; CHECK-LABEL: @test_atomicrmw_0(
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; CHECK-NEXT: store i64 1, i64* @z, align 8
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; CHECK-NEXT: [[RES:%.*]] = atomicrmw add i64* @z, i64 -1 monotonic
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; CHECK-NEXT: ret i64 [[RES]]
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;
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store i64 1, i64* @z
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%res = atomicrmw add i64* @z, i64 -1 monotonic
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ret i64 %res
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}
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; Be conservative, do not kill regular store.
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define i64 @test_atomicrmw_1() {
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; CHECK-LABEL: @test_atomicrmw_1(
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; CHECK-NEXT: store i64 1, i64* @z, align 8
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; CHECK-NEXT: [[RES:%.*]] = atomicrmw add i64* @z, i64 -1 acq_rel
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; CHECK-NEXT: ret i64 [[RES]]
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;
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store i64 1, i64* @z
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%res = atomicrmw add i64* @z, i64 -1 acq_rel
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ret i64 %res
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}
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; Monotonic atomicrmw should not block eliminating no-aliasing stores.
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define i64 @test_atomicrmw_2() {
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; CHECK-LABEL: @test_atomicrmw_2(
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; CHECK-NEXT: [[RES:%.*]] = atomicrmw add i64* @a, i64 -1 monotonic
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; CHECK-NEXT: store i64 2, i64* @z, align 8
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; CHECK-NEXT: ret i64 [[RES]]
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;
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store i64 1, i64* @z
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%res = atomicrmw add i64* @a, i64 -1 monotonic
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store i64 2, i64* @z
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ret i64 %res
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}
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; Be conservative, do not eliminate stores across atomic operations > monotonic.
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define i64 @test_atomicrmw_3() {
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; CHECK-LABEL: @test_atomicrmw_3(
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; CHECK-NEXT: store i64 1, i64* @z, align 8
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; CHECK-NEXT: [[RES:%.*]] = atomicrmw add i64* @a, i64 -1 release
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; CHECK-NEXT: store i64 2, i64* @z, align 8
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; CHECK-NEXT: ret i64 [[RES]]
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;
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store i64 1, i64* @z
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%res = atomicrmw add i64* @a, i64 -1 release
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store i64 2, i64* @z
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ret i64 %res
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}
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; Be conservative, do not eliminate may-alias stores.
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define i64 @test_atomicrmw_4(i64* %ptr) {
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; CHECK-LABEL: @test_atomicrmw_4(
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; CHECK-NEXT: store i64 1, i64* @z, align 8
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; CHECK-NEXT: [[RES:%.*]] = atomicrmw add i64* [[PTR:%.*]], i64 -1 monotonic
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; CHECK-NEXT: store i64 2, i64* @z, align 8
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; CHECK-NEXT: ret i64 [[RES]]
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;
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store i64 1, i64* @z
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%res = atomicrmw add i64* %ptr, i64 -1 monotonic
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store i64 2, i64* @z
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ret i64 %res
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}
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; Be conservative, do not eliminate aliasing stores.
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define i64 @test_atomicrmw_5() {
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; CHECK-LABEL: @test_atomicrmw_5(
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; CHECK-NEXT: store i64 1, i64* @z, align 8
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; CHECK-NEXT: [[RES:%.*]] = atomicrmw add i64* @z, i64 -1 monotonic
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; CHECK-NEXT: store i64 2, i64* @z, align 8
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; CHECK-NEXT: ret i64 [[RES]]
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;
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store i64 1, i64* @z
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%res = atomicrmw add i64* @z, i64 -1 monotonic
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store i64 2, i64* @z
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ret i64 %res
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}
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; Be conservative, do not eliminate non-monotonic cmpxchg.
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define { i32, i1} @test_cmpxchg_1() {
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; CHECK-LABEL: @test_cmpxchg_1(
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; CHECK-NEXT: store i32 1, i32* @x, align 4
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; CHECK-NEXT: [[RET:%.*]] = cmpxchg volatile i32* @x, i32 10, i32 20 seq_cst monotonic
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; CHECK-NEXT: store i32 2, i32* @x, align 4
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; CHECK-NEXT: ret { i32, i1 } [[RET]]
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;
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store i32 1, i32* @x
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%ret = cmpxchg volatile i32* @x, i32 10, i32 20 seq_cst monotonic
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store i32 2, i32* @x
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ret { i32, i1 } %ret
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}
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; Monotonic cmpxchg should not block DSE for non-aliasing stores.
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define { i32, i1} @test_cmpxchg_2() {
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; CHECK-LABEL: @test_cmpxchg_2(
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; CHECK-NEXT: [[RET:%.*]] = cmpxchg volatile i32* @y, i32 10, i32 20 monotonic monotonic
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; CHECK-NEXT: store i32 2, i32* @x, align 4
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; CHECK-NEXT: ret { i32, i1 } [[RET]]
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;
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store i32 1, i32* @x
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%ret = cmpxchg volatile i32* @y, i32 10, i32 20 monotonic monotonic
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store i32 2, i32* @x
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ret { i32, i1 } %ret
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}
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; Be conservative, do not eliminate non-monotonic cmpxchg.
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define { i32, i1} @test_cmpxchg_3() {
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; CHECK-LABEL: @test_cmpxchg_3(
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; CHECK-NEXT: store i32 1, i32* @x, align 4
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; CHECK-NEXT: [[RET:%.*]] = cmpxchg volatile i32* @y, i32 10, i32 20 seq_cst seq_cst
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; CHECK-NEXT: store i32 2, i32* @x, align 4
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; CHECK-NEXT: ret { i32, i1 } [[RET]]
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;
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store i32 1, i32* @x
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%ret = cmpxchg volatile i32* @y, i32 10, i32 20 seq_cst seq_cst
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store i32 2, i32* @x
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ret { i32, i1 } %ret
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}
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; Be conservative, do not eliminate may-alias stores.
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define { i32, i1} @test_cmpxchg_4(i32* %ptr) {
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; CHECK-LABEL: @test_cmpxchg_4(
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; CHECK-NEXT: store i32 1, i32* @x, align 4
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; CHECK-NEXT: [[RET:%.*]] = cmpxchg volatile i32* [[PTR:%.*]], i32 10, i32 20 monotonic monotonic
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; CHECK-NEXT: store i32 2, i32* @x, align 4
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; CHECK-NEXT: ret { i32, i1 } [[RET]]
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;
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store i32 1, i32* @x
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%ret = cmpxchg volatile i32* %ptr, i32 10, i32 20 monotonic monotonic
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store i32 2, i32* @x
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ret { i32, i1 } %ret
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}
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; Be conservative, do not eliminate alias stores.
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define { i32, i1} @test_cmpxchg_5(i32* %ptr) {
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; CHECK-LABEL: @test_cmpxchg_5(
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; CHECK-NEXT: store i32 1, i32* @x, align 4
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; CHECK-NEXT: [[RET:%.*]] = cmpxchg volatile i32* @x, i32 10, i32 20 monotonic monotonic
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; CHECK-NEXT: store i32 2, i32* @x, align 4
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; CHECK-NEXT: ret { i32, i1 } [[RET]]
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;
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store i32 1, i32* @x
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%ret = cmpxchg volatile i32* @x, i32 10, i32 20 monotonic monotonic
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store i32 2, i32* @x
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ret { i32, i1 } %ret
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}
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; **** Noop load->store tests **************************************************
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; We can optimize unordered atomic loads or stores.
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define void @test_load_atomic(i32* %Q) {
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; CHECK-LABEL: @test_load_atomic(
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; CHECK-NEXT: ret void
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;
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%a = load atomic i32, i32* %Q unordered, align 4
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store atomic i32 %a, i32* %Q unordered, align 4
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ret void
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}
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; We can optimize unordered atomic loads or stores.
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define void @test_store_atomic(i32* %Q) {
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; CHECK-LABEL: @test_store_atomic(
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; CHECK-NEXT: ret void
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;
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%a = load i32, i32* %Q
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store atomic i32 %a, i32* %Q unordered, align 4
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ret void
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}
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; We can NOT optimize release atomic loads or stores.
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define void @test_store_atomic_release(i32* %Q) {
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; CHECK-LABEL: @test_store_atomic_release(
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; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[Q:%.*]], align 4
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; CHECK-NEXT: store atomic i32 [[A]], i32* [[Q]] release, align 4
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; CHECK-NEXT: ret void
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;
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%a = load i32, i32* %Q
|
||
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|
store atomic i32 %a, i32* %Q release, align 4
|
||
|
|
ret void
|
||
|
|
}
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