207 lines
8.4 KiB
ArmAsm
207 lines
8.4 KiB
ArmAsm
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// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --implicit-check-not=error: --strict-whitespace
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//==============================================================================
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// 'null' operand is not supported on this GPU
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s_add_u32 null, null, null
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// CHECK: error: 'null' operand is not supported on this GPU
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// CHECK-NEXT:{{^}}s_add_u32 null, null, null
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// ABS not allowed in VOP3B instructions
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v_div_scale_f64 v[24:25], vcc, -|v[22:23]|, v[22:23], v[20:21]
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// CHECK: error: ABS not allowed in VOP3B instructions
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// CHECK-NEXT:{{^}}v_div_scale_f64 v[24:25], vcc, -|v[22:23]|, v[22:23], v[20:21]
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// CHECK-NEXT:{{^}}^
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//==============================================================================
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// duplicate VGPR index mode
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s_set_gpr_idx_on s0, gpr_idx(SRC0,DST,SRC1,DST)
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// CHECK: error: duplicate VGPR index mode
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// CHECK-NEXT:{{^}}s_set_gpr_idx_on s0, gpr_idx(SRC0,DST,SRC1,DST)
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// exp target is not supported on this GPU
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exp pos4 v4, v3, v2, v1
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// CHECK: error: exp target is not supported on this GPU
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// CHECK-NEXT:{{^}}exp pos4 v4, v3, v2, v1
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// expected a 12-bit unsigned offset
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flat_load_dword v1, v[3:4] offset:-1
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// CHECK: error: expected a 12-bit unsigned offset
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// CHECK-NEXT:{{^}}flat_load_dword v1, v[3:4] offset:-1
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// CHECK-NEXT:{{^}} ^
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flat_load_dword v1, v[3:4] offset:4096
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// CHECK: error: expected a 12-bit unsigned offset
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// CHECK-NEXT:{{^}}flat_load_dword v1, v[3:4] offset:4096
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// expected a 13-bit signed offset
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global_load_dword v1, v[3:4] off, offset:-4097
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// CHECK: error: expected a 13-bit signed offset
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// CHECK-NEXT:{{^}}global_load_dword v1, v[3:4] off, offset:-4097
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// expected a VGPR index mode
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s_set_gpr_idx_on s0, gpr_idx(SRC0,
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// CHECK: error: expected a VGPR index mode
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// CHECK-NEXT:{{^}}s_set_gpr_idx_on s0, gpr_idx(SRC0,
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// expected a VGPR index mode or a closing parenthesis
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s_set_gpr_idx_on s0, gpr_idx(
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// CHECK: error: expected a VGPR index mode or a closing parenthesis
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// CHECK-NEXT:{{^}}s_set_gpr_idx_on s0, gpr_idx(
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// CHECK-NEXT:{{^}} ^
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s_set_gpr_idx_on s0, gpr_idx(X)
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// CHECK: error: expected a VGPR index mode or a closing parenthesis
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// CHECK-NEXT:{{^}}s_set_gpr_idx_on s0, gpr_idx(X)
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// expected a comma or a closing parenthesis
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s_set_gpr_idx_on s0, gpr_idx(DST
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// CHECK: error: expected a comma or a closing parenthesis
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// CHECK-NEXT:{{^}}s_set_gpr_idx_on s0, gpr_idx(DST
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// expected absolute expression
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s_set_gpr_idx_on s0, gpr_idx
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// CHECK: error: expected absolute expression
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// CHECK-NEXT:{{^}}s_set_gpr_idx_on s0, gpr_idx
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// CHECK-NEXT:{{^}} ^
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s_set_gpr_idx_on s0, s1
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// CHECK: error: expected absolute expression
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// CHECK-NEXT:{{^}}s_set_gpr_idx_on s0, s1
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// invalid atomic image dmask
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image_atomic_add v252, v2, s[8:15]
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// CHECK: error: invalid atomic image dmask
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// CHECK-NEXT:{{^}}image_atomic_add v252, v2, s[8:15]
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// CHECK-NEXT:{{^}}^
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image_atomic_cmpswap v[4:7], v[192:195], s[28:35] dmask:0xe tfe
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// CHECK: error: invalid atomic image dmask
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// CHECK-NEXT:{{^}}image_atomic_cmpswap v[4:7], v[192:195], s[28:35] dmask:0xe tfe
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// invalid image_gather dmask: only one bit must be set
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image_gather4_cl v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK: error: invalid image_gather dmask: only one bit must be set
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// CHECK-NEXT:{{^}}image_gather4_cl v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x3
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// invalid immediate: only 4-bit values are legal
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s_set_gpr_idx_on s0, 16
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// CHECK: error: invalid immediate: only 4-bit values are legal
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// CHECK-NEXT:{{^}}s_set_gpr_idx_on s0, 16
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// invalid operand (violates constant bus restrictions)
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v_add_f32_e64 v0, flat_scratch_hi, m0
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// CHECK: error: invalid operand (violates constant bus restrictions)
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// CHECK-NEXT:{{^}}v_add_f32_e64 v0, flat_scratch_hi, m0
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// CHECK-NEXT:{{^}} ^
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v_madak_f32 v5, s1, v2, 0xa1b1c1d1
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// CHECK: error: invalid operand (violates constant bus restrictions)
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// CHECK-NEXT:{{^}}v_madak_f32 v5, s1, v2, 0xa1b1c1d1
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// CHECK-NEXT:{{^}} ^
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v_madmk_f32 v5, s1, 0x11213141, v255
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// CHECK: error: invalid operand (violates constant bus restrictions)
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// CHECK-NEXT:{{^}}v_madmk_f32 v5, s1, 0x11213141, v255
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// literal operands are not supported
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v_bfe_u32 v0, v2, v3, undef
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// CHECK: error: literal operands are not supported
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// CHECK-NEXT:{{^}}v_bfe_u32 v0, v2, v3, undef
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// CHECK-NEXT:{{^}} ^
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v_bfe_u32 v0, v2, undef, v3
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// CHECK: error: literal operands are not supported
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// CHECK-NEXT:{{^}}v_bfe_u32 v0, v2, undef, v3
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// CHECK-NEXT:{{^}} ^
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v_add_i16 v5, v1, 0.5
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// CHECK: error: literal operands are not supported
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// CHECK-NEXT:{{^}}v_add_i16 v5, v1, 0.5
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// CHECK-NEXT:{{^}} ^
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v_add_i16 v5, 0.5, v2
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// CHECK: error: literal operands are not supported
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// CHECK-NEXT:{{^}}v_add_i16 v5, 0.5, v2
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// r128 modifier is not supported on this GPU
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image_atomic_add v10, v6, s[8:15] dmask:0x1 r128
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// CHECK: error: r128 modifier is not supported on this GPU
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// CHECK-NEXT:{{^}}image_atomic_add v10, v6, s[8:15] dmask:0x1 r128
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// unified format is not supported on this GPU
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tbuffer_store_format_xyzw v[1:4], v1, s[4:7], s0 format:[BUF_FMT_8_SNORM,BUF_DATA_FORMAT_8] idxen
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// CHECK: error: unified format is not supported on this GPU
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// CHECK-NEXT:{{^}}tbuffer_store_format_xyzw v[1:4], v1, s[4:7], s0 format:[BUF_FMT_8_SNORM,BUF_DATA_FORMAT_8] idxen
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// duplicate format
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tbuffer_store_format_xyzw v[1:4], off, ttmp[4:7], dfmt:1 s0 format:[BUF_NUM_FORMAT_FLOAT]
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// CHECK: error: duplicate format
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// CHECK-NEXT:{{^}}tbuffer_store_format_xyzw v[1:4], off, ttmp[4:7], dfmt:1 s0 format:[BUF_NUM_FORMAT_FLOAT]
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// out of range dfmt
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tbuffer_store_format_xyzw v[1:4], off, ttmp[4:7] dfmt:16 nfmt:1 s0
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// CHECK: error: out of range dfmt
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// CHECK-NEXT:{{^}}tbuffer_store_format_xyzw v[1:4], off, ttmp[4:7] dfmt:16 nfmt:1 s0
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// CHECK-NEXT:{{^}} ^
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//==============================================================================
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// out of range nfmt
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tbuffer_store_format_xyzw v[1:4], off, ttmp[4:7] dfmt:1 nfmt:-1 s0
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// CHECK: error: out of range nfmt
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// CHECK-NEXT:{{^}}tbuffer_store_format_xyzw v[1:4], off, ttmp[4:7] dfmt:1 nfmt:-1 s0
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// CHECK-NEXT:{{^}} ^
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