55 lines
2.0 KiB
ArmAsm
55 lines
2.0 KiB
ArmAsm
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// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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fdiv z0.h, p7/m, z0.h, z31.h
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// CHECK-INST: fdiv z0.h, p7/m, z0.h, z31.h
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// CHECK-ENCODING: [0xe0,0x9f,0x4d,0x65]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 9f 4d 65 <unknown>
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fdiv z0.s, p7/m, z0.s, z31.s
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// CHECK-INST: fdiv z0.s, p7/m, z0.s, z31.s
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// CHECK-ENCODING: [0xe0,0x9f,0x8d,0x65]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 9f 8d 65 <unknown>
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fdiv z0.d, p7/m, z0.d, z31.d
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// CHECK-INST: fdiv z0.d, p7/m, z0.d, z31.d
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// CHECK-ENCODING: [0xe0,0x9f,0xcd,0x65]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 9f cd 65 <unknown>
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// --------------------------------------------------------------------------//
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// Test compatibility with MOVPRFX instruction.
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movprfx z0.d, p7/z, z7.d
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// CHECK-INST: movprfx z0.d, p7/z, z7.d
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// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
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fdiv z0.d, p7/m, z0.d, z31.d
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// CHECK-INST: fdiv z0.d, p7/m, z0.d, z31.d
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// CHECK-ENCODING: [0xe0,0x9f,0xcd,0x65]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 9f cd 65 <unknown>
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movprfx z0, z7
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// CHECK-INST: movprfx z0, z7
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// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
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fdiv z0.d, p7/m, z0.d, z31.d
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// CHECK-INST: fdiv z0.d, p7/m, z0.d, z31.d
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// CHECK-ENCODING: [0xe0,0x9f,0xcd,0x65]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 9f cd 65 <unknown>
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