126 lines
5.0 KiB
LLVM
126 lines
5.0 KiB
LLVM
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; RUN: opt < %s -S -mcpu=z13 -msan-kernel=1 -float-abi=soft -passes=msan 2>&1 | FileCheck %s
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; RUN: opt < %s -msan -S -mcpu=z13 -msan-kernel=1 -float-abi=soft | FileCheck %s
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target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"
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target triple = "s390x-unknown-linux-gnu"
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declare i64 @foo(i64 %guard, ...) #0
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attributes #0 = { "target-features"="+soft-float" "use-soft-float"="true" }
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declare i32 @random_i32()
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declare i64 @random_i64()
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declare float @random_float()
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declare double @random_double()
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define i64 @bar() #1 {
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%arg2 = call i32 () @random_i32()
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%arg3 = call float () @random_float()
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%arg4 = call i32 () @random_i32()
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%arg5 = call double () @random_double()
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%arg6 = call i64 () @random_i64()
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%arg9 = call i32 () @random_i32()
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%arg11 = call float () @random_float()
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%arg12 = call i32 () @random_i32()
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%arg13 = call double () @random_double()
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%arg14 = call i64 () @random_i64()
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%1 = call i64 (i64, ...) @foo(i64 1, i32 zeroext %arg2, float %arg3,
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i32 signext %arg4, double %arg5, i64 %arg6,
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i64 7, double 8.0, i32 zeroext %arg9,
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double 10.0, float %arg11, i32 signext %arg12,
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double %arg13, i64 %arg14)
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ret i64 %1
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}
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attributes #1 = { sanitize_memory }
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; In kernel the floating point values are passed in GPRs:
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; - r2@16 == i64 1 - skipped, because it's fixed
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; - r3@24 == i32 zext %arg2 - shadow is zero-extended
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; - r4@(32 + 4) == float %arg3 - right-justified, shadow is 32-bit
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; - r5@40 == i32 sext %arg4 - shadow is sign-extended
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; - r6@48 == double %arg5 - straightforward
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; - overflow@160 == i64 %arg6 - straightforward
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; - overflow@168 == 7 - filler
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; - overflow@176 == 8.0 - filler
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; - overflow@184 == i32 zext %arg9 - shadow is zero-extended
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; - overflow@192 == 10.0 - filler
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; - overflow@(200 + 4) == float %arg11 - right-justified, shadow is 32-bit
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; - overflow@208 == i32 sext %arg12 - shadow is sign-extended
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; - overflow@216 == double %arg13 - straightforward
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; - overflow@224 == i64 %arg14 - straightforward
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; Overflow arg area size is 72.
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; CHECK-LABEL: @bar
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; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64
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; CHECK: [[S:%.*]] = add i64 [[B]], 24
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; CHECK: [[V:%.*]] = zext {{.*}}
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; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64*
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; CHECK: store {{.*}} [[V]], {{.*}} [[M]]
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; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64
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; CHECK: [[S:%.*]] = add i64 [[B]], 36
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; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i32*
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; CHECK: store {{.*}} [[M]]
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; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64
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; CHECK: [[S:%.*]] = add i64 [[B]], 40
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; CHECK: [[V:%.*]] = sext {{.*}}
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; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64*
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; CHECK: store {{.*}} [[V]], {{.*}} [[M]]
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; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64
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; CHECK: [[S:%.*]] = add i64 [[B]], 48
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; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64*
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; CHECK: store {{.*}} [[M]]
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; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64
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; CHECK: [[S:%.*]] = add i64 [[B]], 160
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; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64*
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; CHECK: store {{.*}} [[M]]
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; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64
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; CHECK: [[S:%.*]] = add i64 [[B]], 168
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; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64*
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; CHECK: store {{.*}} [[M]]
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; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64
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; CHECK: [[S:%.*]] = add i64 [[B]], 176
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; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64*
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; CHECK: store {{.*}} [[M]]
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; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64
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; CHECK: [[S:%.*]] = add i64 [[B]], 184
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; CHECK: [[V:%.*]] = zext {{.*}}
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; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64*
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; CHECK: store {{.*}} [[V]], {{.*}} [[M]]
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; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64
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; CHECK: [[S:%.*]] = add i64 [[B]], 192
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; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64*
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; CHECK: store {{.*}} [[M]]
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; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64
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; CHECK: [[S:%.*]] = add i64 [[B]], 204
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; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i32*
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; CHECK: store {{.*}} [[M]]
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; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64
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; CHECK: [[S:%.*]] = add i64 [[B]], 208
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; CHECK: [[V:%.*]] = sext {{.*}}
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; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64*
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; CHECK: store {{.*}} [[V]], {{.*}} [[M]]
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; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64
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; CHECK: [[S:%.*]] = add i64 [[B]], 216
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; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64*
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; CHECK: store {{.*}} [[M]]
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; CHECK: [[B:%.*]] = ptrtoint [100 x i64]* %va_arg_shadow to i64
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; CHECK: [[S:%.*]] = add i64 [[B]], 224
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; CHECK: [[M:%_msarg_va_s.*]] = inttoptr i64 [[S]] to i64*
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; CHECK: store {{.*}} [[M]]
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; CHECK: store {{.*}} 72, {{.*}} %va_arg_overflow_size
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