180 lines
4.5 KiB
LLVM
180 lines
4.5 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
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define i64 @test1(i8* %data) {
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; X86-LABEL: test1:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movzbl (%eax), %eax
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; X86-NEXT: shll $2, %eax
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; X86-NEXT: andl $60, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: test1:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movl (%rdi), %eax
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; X64-NEXT: shll $2, %eax
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; X64-NEXT: andl $60, %eax
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; X64-NEXT: retq
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entry:
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%bf.load = load i8, i8* %data, align 4
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%bf.clear = shl i8 %bf.load, 2
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%0 = and i8 %bf.clear, 60
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%mul = zext i8 %0 to i64
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ret i64 %mul
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}
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define i8* @test2(i8* %data) {
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; X86-LABEL: test2:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movzbl (%eax), %ecx
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; X86-NEXT: andl $15, %ecx
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; X86-NEXT: leal (%eax,%ecx,4), %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: test2:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movl (%rdi), %eax
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; X64-NEXT: andl $15, %eax
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; X64-NEXT: leaq (%rdi,%rax,4), %rax
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; X64-NEXT: retq
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entry:
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%bf.load = load i8, i8* %data, align 4
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%bf.clear = shl i8 %bf.load, 2
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%0 = and i8 %bf.clear, 60
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%mul = zext i8 %0 to i64
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%add.ptr = getelementptr inbounds i8, i8* %data, i64 %mul
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ret i8* %add.ptr
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}
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; If the shift op is SHL, the logic op can only be AND.
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define i64 @test3(i8* %data) {
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; X86-LABEL: test3:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movb (%eax), %al
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; X86-NEXT: shlb $2, %al
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; X86-NEXT: xorb $60, %al
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; X86-NEXT: movzbl %al, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: test3:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movb (%rdi), %al
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; X64-NEXT: shlb $2, %al
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; X64-NEXT: xorb $60, %al
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; X64-NEXT: movzbl %al, %eax
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; X64-NEXT: retq
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entry:
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%bf.load = load i8, i8* %data, align 4
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%bf.clear = shl i8 %bf.load, 2
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%0 = xor i8 %bf.clear, 60
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%mul = zext i8 %0 to i64
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ret i64 %mul
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}
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define i64 @test4(i8* %data) {
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; X86-LABEL: test4:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movzbl (%eax), %eax
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; X86-NEXT: shrl $2, %eax
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; X86-NEXT: andl $-4, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: test4:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movl (%rdi), %eax
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; X64-NEXT: shrq $2, %rax
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; X64-NEXT: andl $60, %eax
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; X64-NEXT: retq
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entry:
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%bf.load = load i8, i8* %data, align 4
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%bf.clear = lshr i8 %bf.load, 2
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%0 = and i8 %bf.clear, 60
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%1 = zext i8 %0 to i64
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ret i64 %1
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}
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define i64 @test5(i8* %data) {
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; X86-LABEL: test5:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movzbl (%eax), %eax
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; X86-NEXT: shrl $2, %eax
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; X86-NEXT: xorl $60, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: test5:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movzbl (%rdi), %eax
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; X64-NEXT: shrq $2, %rax
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; X64-NEXT: xorq $60, %rax
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; X64-NEXT: retq
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entry:
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%bf.load = load i8, i8* %data, align 4
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%bf.clear = lshr i8 %bf.load, 2
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%0 = xor i8 %bf.clear, 60
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%1 = zext i8 %0 to i64
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ret i64 %1
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}
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define i64 @test6(i8* %data) {
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; X86-LABEL: test6:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movzbl (%eax), %eax
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; X86-NEXT: shrl $2, %eax
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; X86-NEXT: orl $60, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: test6:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movzbl (%rdi), %eax
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; X64-NEXT: shrq $2, %rax
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; X64-NEXT: orq $60, %rax
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; X64-NEXT: retq
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entry:
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%bf.load = load i8, i8* %data, align 4
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%bf.clear = lshr i8 %bf.load, 2
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%0 = or i8 %bf.clear, 60
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%1 = zext i8 %0 to i64
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ret i64 %1
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}
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; Load is folded with sext.
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define i64 @test8(i8* %data) {
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; X86-LABEL: test8:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movsbl (%eax), %eax
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; X86-NEXT: movzwl %ax, %eax
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; X86-NEXT: shrl $2, %eax
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; X86-NEXT: orl $60, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: test8:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movsbl (%rdi), %eax
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; X64-NEXT: movzwl %ax, %eax
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; X64-NEXT: shrl $2, %eax
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; X64-NEXT: orl $60, %eax
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; X64-NEXT: retq
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entry:
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%bf.load = load i8, i8* %data, align 4
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%ext = sext i8 %bf.load to i16
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%bf.clear = lshr i16 %ext, 2
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%0 = or i16 %bf.clear, 60
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%1 = zext i16 %0 to i64
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ret i64 %1
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}
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