29 lines
1.4 KiB
LLVM
29 lines
1.4 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 -mattr=prefer-256-bit | FileCheck %s
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define void @test(<64 x i8>* %a0) #0 {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vmovdqu (%rdi), %xmm0
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; CHECK-NEXT: vpblendd {{.*#+}} xmm0 = mem[0],xmm0[1,2,3]
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; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[4,4,5,5,0,0,1,1,u,u,u,u,u,u,u,u]
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; CHECK-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
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; CHECK-NEXT: vpternlogq $15, %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: vpextrb $1, %xmm0, (%rax)
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; CHECK-NEXT: vpextrb $4, %xmm0, (%rax)
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; CHECK-NEXT: vpextrb $8, %xmm0, (%rax)
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; CHECK-NEXT: retq
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%load = load <64 x i8>, <64 x i8>* %a0, align 1
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%shuf = shufflevector <64 x i8> %load, <64 x i8> undef, <16 x i32> <i32 0, i32 4, i32 8, i32 12, i32 16, i32 20, i32 24, i32 28, i32 32, i32 36, i32 40, i32 44, i32 48, i32 52, i32 56, i32 60>
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%xor = xor <16 x i8> %shuf, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
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%i1 = extractelement <16 x i8> %xor, i32 1
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%i2 = extractelement <16 x i8> %xor, i32 4
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%i3 = extractelement <16 x i8> %xor, i32 8
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store i8 %i1, i8* undef, align 1
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store i8 %i2, i8* undef, align 1
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store i8 %i3, i8* undef, align 1
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ret void
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}
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attributes #0 = { "min-legal-vector-width"="0" "target-cpu"="skylake-avx512" }
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