91 lines
2.8 KiB
LLVM
91 lines
2.8 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown -mattr=-sse2,+sse | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=-sse2,+sse | FileCheck %s --check-prefix=X64
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define float @f32_pos(float %a, float %b) nounwind {
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; X86-LABEL: f32_pos:
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; X86: # %bb.0:
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; X86-NEXT: pushl %eax
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; X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; X86-NEXT: andps {{\.LCPI.*}}, %xmm0
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; X86-NEXT: movss %xmm0, (%esp)
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; X86-NEXT: flds (%esp)
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; X86-NEXT: popl %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: f32_pos:
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; X64: # %bb.0:
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; X64-NEXT: andps {{.*}}(%rip), %xmm0
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; X64-NEXT: retq
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%tmp = tail call float @llvm.copysign.f32(float %a, float 1.0)
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ret float %tmp
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}
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define float @f32_neg(float %a, float %b) nounwind {
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; X86-LABEL: f32_neg:
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; X86: # %bb.0:
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; X86-NEXT: pushl %eax
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; X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; X86-NEXT: orps {{\.LCPI.*}}, %xmm0
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; X86-NEXT: movss %xmm0, (%esp)
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; X86-NEXT: flds (%esp)
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; X86-NEXT: popl %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: f32_neg:
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; X64: # %bb.0:
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; X64-NEXT: orps {{.*}}(%rip), %xmm0
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; X64-NEXT: retq
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%tmp = tail call float @llvm.copysign.f32(float %a, float -1.0)
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ret float %tmp
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}
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define <4 x float> @v4f32_pos(<4 x float> %a, <4 x float> %b) nounwind {
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; X86-LABEL: v4f32_pos:
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; X86: # %bb.0:
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; X86-NEXT: andps {{\.LCPI.*}}, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: v4f32_pos:
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; X64: # %bb.0:
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; X64-NEXT: andps {{.*}}(%rip), %xmm0
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; X64-NEXT: retq
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%tmp = tail call <4 x float> @llvm.copysign.v4f32(<4 x float> %a, <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>)
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ret <4 x float> %tmp
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}
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define <4 x float> @v4f32_neg(<4 x float> %a, <4 x float> %b) nounwind {
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; X86-LABEL: v4f32_neg:
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; X86: # %bb.0:
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; X86-NEXT: orps {{\.LCPI.*}}, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: v4f32_neg:
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; X64: # %bb.0:
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; X64-NEXT: orps {{.*}}(%rip), %xmm0
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; X64-NEXT: retq
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%tmp = tail call <4 x float> @llvm.copysign.v4f32(<4 x float> %a, <4 x float> <float -1.0, float -1.0, float -1.0, float -1.0>)
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ret <4 x float> %tmp
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}
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define <4 x float> @v4f32_const_mag(<4 x float> %a, <4 x float> %b) nounwind {
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; X86-LABEL: v4f32_const_mag:
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; X86: # %bb.0:
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; X86-NEXT: movaps %xmm1, %xmm0
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; X86-NEXT: andps {{\.LCPI.*}}, %xmm0
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; X86-NEXT: orps {{\.LCPI.*}}, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: v4f32_const_mag:
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; X64: # %bb.0:
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; X64-NEXT: movaps %xmm1, %xmm0
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; X64-NEXT: andps {{.*}}(%rip), %xmm0
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; X64-NEXT: orps {{.*}}(%rip), %xmm0
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; X64-NEXT: retq
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%tmp = tail call <4 x float> @llvm.copysign.v4f32(<4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, <4 x float> %b )
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ret <4 x float> %tmp
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}
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declare float @llvm.copysign.f32(float, float)
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declare <4 x float> @llvm.copysign.v4f32(<4 x float>, <4 x float>)
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