llvm-for-llvmta/test/CodeGen/X86/pr40994.ll

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2022-04-25 10:02:23 +02:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.2 | FileCheck %s
define <8 x i8> @foo(<16 x i8> %a) {
; CHECK-LABEL: foo:
; CHECK: # %bb.0:
; CHECK-NEXT: pextrb $0, %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: pextrb $2, %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: pextrb $4, %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: pextrb $6, %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: pextrb $8, %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: pextrb $10, %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: pextrb $12, %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: pextrb $14, %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: retq
%v = alloca i8, i32 8, align 16
call void @llvm.masked.compressstore.v16i8(<16 x i8> %a, i8* %v, <16 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false>)
%ptr = bitcast i8* %v to <8 x i8>*
%out = load <8 x i8>, <8 x i8>* %ptr
ret <8 x i8> %out
}
declare void @llvm.masked.compressstore.v16i8(<16 x i8>, i8*, <16 x i1>) #0