71 lines
2.1 KiB
LLVM
71 lines
2.1 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
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define i32 @PR40483_add1(i32*, i32) nounwind {
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; X86-LABEL: PR40483_add1:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl (%ecx), %eax
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; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl %eax, (%ecx)
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; X86-NEXT: jae .LBB0_2
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; X86-NEXT: # %bb.1:
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: .LBB0_2:
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; X86-NEXT: retl
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;
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; X64-LABEL: PR40483_add1:
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; X64: # %bb.0:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: addl (%rdi), %esi
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; X64-NEXT: movl %esi, (%rdi)
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; X64-NEXT: cmovael %esi, %eax
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; X64-NEXT: retq
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%3 = load i32, i32* %0, align 8
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%4 = tail call { i8, i32 } @llvm.x86.addcarry.32(i8 0, i32 %3, i32 %1)
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%5 = extractvalue { i8, i32 } %4, 1
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store i32 %5, i32* %0, align 8
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%6 = extractvalue { i8, i32 } %4, 0
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%7 = icmp eq i8 %6, 0
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%8 = add i32 %1, %3
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%9 = or i32 %5, %8
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%10 = select i1 %7, i32 %9, i32 0
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ret i32 %10
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}
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define i32 @PR40483_add2(i32*, i32) nounwind {
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; X86-LABEL: PR40483_add2:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl (%edx), %ecx
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl %ecx, (%edx)
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; X86-NEXT: jae .LBB1_2
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; X86-NEXT: # %bb.1:
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: .LBB1_2:
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; X86-NEXT: retl
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;
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; X64-LABEL: PR40483_add2:
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; X64: # %bb.0:
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: addl (%rdi), %esi
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; X64-NEXT: movl %esi, (%rdi)
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; X64-NEXT: cmovbl %esi, %eax
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; X64-NEXT: retq
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%3 = load i32, i32* %0, align 8
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%4 = tail call { i8, i32 } @llvm.x86.addcarry.32(i8 0, i32 %3, i32 %1)
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%5 = extractvalue { i8, i32 } %4, 1
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store i32 %5, i32* %0, align 8
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%6 = extractvalue { i8, i32 } %4, 0
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%7 = icmp eq i8 %6, 0
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%8 = add i32 %3, %1
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%9 = or i32 %5, %8
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%10 = select i1 %7, i32 0, i32 %9
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ret i32 %10
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}
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declare { i8, i32 } @llvm.x86.addcarry.32(i8, i32, i32)
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