86 lines
2.3 KiB
LLVM
86 lines
2.3 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
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; rdar://7527734
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define i32 @test1(i32 %x) nounwind ssp {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: shll $5, %edi
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; CHECK-NEXT: leal 3(%rdi), %eax
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; CHECK-NEXT: retq
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%t0 = shl i32 %x, 5
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%t1 = or i32 %t0, 3
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ret i32 %t1
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}
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; This test no longer requires or to be converted to 3 addr form because we are
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; are able to use a zero extend instead of an 'and' which gives the register
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; allocator freedom.
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define i64 @test2(i8 %A, i8 %B) nounwind {
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: shll $4, %edi
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; CHECK-NEXT: andl $48, %edi
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; CHECK-NEXT: movzbl %sil, %eax
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; CHECK-NEXT: shrq $4, %rax
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; CHECK-NEXT: orq %rdi, %rax
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; CHECK-NEXT: retq
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%C = zext i8 %A to i64
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%D = shl i64 %C, 4
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%E = and i64 %D, 48
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%F = zext i8 %B to i64
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%G = lshr i64 %F, 4
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%H = or i64 %G, %E
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ret i64 %H
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}
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;; Test that OR is only emitted as LEA, not as ADD.
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; No reason to emit an add here, should be an or.
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define void @test3(i32 %x, i32* %P) nounwind readnone ssp {
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; CHECK-LABEL: test3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: shll $5, %edi
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; CHECK-NEXT: orl $3, %edi
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; CHECK-NEXT: movl %edi, (%rsi)
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; CHECK-NEXT: retq
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%t0 = shl i32 %x, 5
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%t1 = or i32 %t0, 3
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store i32 %t1, i32* %P
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ret void
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}
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define i32 @test4(i32 %a, i32 %b) nounwind readnone ssp {
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; CHECK-LABEL: test4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: andl $6, %edi
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; CHECK-NEXT: andl $16, %esi
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; CHECK-NEXT: leal (%rsi,%rdi), %eax
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; CHECK-NEXT: retq
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%and = and i32 %a, 6
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%and2 = and i32 %b, 16
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%or = or i32 %and2, %and
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ret i32 %or
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}
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define void @test5(i32 %a, i32 %b, i32* nocapture %P) nounwind ssp {
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; CHECK-LABEL: test5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: andl $6, %edi
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; CHECK-NEXT: andl $16, %esi
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; CHECK-NEXT: orl %edi, %esi
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; CHECK-NEXT: movl %esi, (%rdx)
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; CHECK-NEXT: retq
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%and = and i32 %a, 6
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%and2 = and i32 %b, 16
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%or = or i32 %and2, %and
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store i32 %or, i32* %P, align 4
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ret void
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}
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