llvm-for-llvmta/test/CodeGen/VE/Scalar/brcond.ll

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2022-04-25 10:02:23 +02:00
; RUN: llc < %s -mtriple=ve | FileCheck %s
; Function Attrs: nounwind
define void @brcond_then(i1 zeroext %0) {
; CHECK-LABEL: brcond_then:
; CHECK: # %bb.0:
; CHECK-NEXT: breq.w 0, %s0, .LBB{{[0-9]+}}_2
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: #APP
; CHECK-NEXT: nop
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: .LBB{{[0-9]+}}_2:
; CHECK-NEXT: b.l.t (, %s10)
br i1 %0, label %2, label %3
2: ; preds = %1
tail call void asm sideeffect "nop", ""()
br label %3
3: ; preds = %2, %1
ret void
}
; Function Attrs: nounwind
define void @brcond_else(i1 zeroext %0) {
; CHECK-LABEL: brcond_else:
; CHECK: # %bb.0:
; CHECK-NEXT: brne.w 0, %s0, .LBB{{[0-9]+}}_2
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: #APP
; CHECK-NEXT: nop
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: .LBB{{[0-9]+}}_2:
; CHECK-NEXT: b.l.t (, %s10)
br i1 %0, label %3, label %2
2: ; preds = %1
tail call void asm sideeffect "nop", ""()
br label %3
3: ; preds = %2, %1
ret void
}