60 lines
2.7 KiB
LLVM
60 lines
2.7 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve -tail-predication=enabled %s -o - | FileCheck %s
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define dso_local arm_aapcs_vfpcc i32 @minmaxval4(i32* nocapture readonly %x, i32* nocapture %minp) {
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; CHECK-LABEL: minmaxval4:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: push {r7, lr}
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; CHECK-NEXT: vmov.i32 q0, #0x80000000
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; CHECK-NEXT: vmvn.i32 q1, #0x80000000
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; CHECK-NEXT: movs r2, #10
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; CHECK-NEXT: dlstp.32 lr, r2
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; CHECK-NEXT: .LBB0_1: @ %vector.body
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; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: vldrw.u32 q2, [r0], #16
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; CHECK-NEXT: vpt.s32 gt, q2, q0
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; CHECK-NEXT: vmovt q0, q2
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; CHECK-NEXT: vpt.s32 gt, q1, q2
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; CHECK-NEXT: vmovt q1, q2
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; CHECK-NEXT: letp lr, .LBB0_1
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; CHECK-NEXT: @ %bb.2: @ %middle.block
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; CHECK-NEXT: mvn r0, #-2147483648
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; CHECK-NEXT: vminv.s32 r0, q1
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; CHECK-NEXT: str r0, [r1]
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; CHECK-NEXT: mov.w r0, #-2147483648
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; CHECK-NEXT: vmaxv.s32 r0, q0
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; CHECK-NEXT: pop {r7, pc}
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entry:
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br label %vector.body
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vector.body: ; preds = %vector.body, %entry
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%index = phi i32 [ 0, %entry ], [ %index.next, %vector.body ]
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%vec.phi = phi <4 x i32> [ <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>, %entry ], [ %5, %vector.body ]
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%vec.phi29 = phi <4 x i32> [ <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>, %entry ], [ %7, %vector.body ]
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%0 = getelementptr inbounds i32, i32* %x, i32 %index
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%active.lane.mask = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 10)
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%1 = bitcast i32* %0 to <4 x i32>*
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%wide.masked.load = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* %1, i32 4, <4 x i1> %active.lane.mask, <4 x i32> undef)
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%2 = icmp sgt <4 x i32> %wide.masked.load, %vec.phi29
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%3 = icmp slt <4 x i32> %wide.masked.load, %vec.phi
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%4 = and <4 x i1> %active.lane.mask, %3
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%5 = select <4 x i1> %4, <4 x i32> %wide.masked.load, <4 x i32> %vec.phi
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%6 = and <4 x i1> %active.lane.mask, %2
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%7 = select <4 x i1> %6, <4 x i32> %wide.masked.load, <4 x i32> %vec.phi29
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%index.next = add i32 %index, 4
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%8 = icmp eq i32 %index.next, 12
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br i1 %8, label %middle.block, label %vector.body
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middle.block: ; preds = %vector.body
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%9 = call i32 @llvm.vector.reduce.smax.v4i32(<4 x i32> %7)
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%10 = call i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> %5)
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store i32 %10, i32* %minp, align 4
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ret i32 %9
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}
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declare <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32, i32) #1
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declare <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>*, i32 immarg, <4 x i1>, <4 x i32>) #2
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declare i32 @llvm.vector.reduce.smin.v4i32(<4 x i32>) #3
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declare i32 @llvm.vector.reduce.smax.v4i32(<4 x i32>) #3
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