79 lines
2.9 KiB
Plaintext
79 lines
2.9 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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# REQUIRES: asserts
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# RUN: llc -mtriple riscv64 -start-before=prologepilog -o - \
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# RUN: -verify-machineinstrs %s | FileCheck %s
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#
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# RUN: llc -mtriple riscv64 -start-before=prologepilog -o /dev/null \
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# RUN: -debug-only=prologepilog -verify-machineinstrs %s 2>&1 \
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# RUN: | FileCheck --check-prefix=DEBUG %s
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#
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# DEBUG: Adjusting emergency spill slots!
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# DEBUG: Adjusting offset of emergency spill slot #4 from -4112 to -8192
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--- |
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; ModuleID = 'reduced.ll'
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source_filename = "frame_layout-1253b1.cpp"
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target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
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target triple = "riscv64"
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; Function Attrs: nounwind
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define weak_odr dso_local void @foo(i8* %ay) nounwind {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addi sp, sp, -2032
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; CHECK-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s0, 2016(sp) # 8-byte Folded Spill
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; CHECK-NEXT: addi s0, sp, 2032
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; CHECK-NEXT: sd a1, 0(sp)
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; CHECK-NEXT: lui a1, 2
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; CHECK-NEXT: addiw a1, a1, -2032
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; CHECK-NEXT: sub sp, sp, a1
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; CHECK-NEXT: srli a1, sp, 12
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; CHECK-NEXT: slli sp, a1, 12
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; CHECK-NEXT: lui a1, 1
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; CHECK-NEXT: addiw a1, a1, -8
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; CHECK-NEXT: add a1, sp, a1
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; CHECK-NEXT: sd a0, 0(a1)
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; CHECK-NEXT: ld a1, 0(sp)
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; CHECK-NEXT: call foo@plt
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; CHECK-NEXT: lui a0, 2
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; CHECK-NEXT: sub sp, s0, a0
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; CHECK-NEXT: lui a0, 2
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; CHECK-NEXT: addiw a0, a0, -2032
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; CHECK-NEXT: add sp, sp, a0
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; CHECK-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 2032
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; CHECK-NEXT: ret
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entry:
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ret void
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}
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...
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---
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name: foo
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alignment: 2
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tracksRegLiveness: false
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frameInfo:
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maxAlignment: 4096
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stack:
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- { id: 0, size: 8, alignment: 4096 }
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- { id: 1, type: spill-slot, size: 8, alignment: 8 }
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machineFunctionInfo: {}
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body: |
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bb.0.entry:
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liveins: $x1, $x5, $x6, $x7, $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $x28, $x29, $x30, $x31
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; This is to store something to the (non-emergency) spill slot %stack.1.
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SD $x10, %stack.1, 0
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; This is here just to make all the eligible registers live at this point.
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; This way when we replace the frame index %stack.1 with its actual address
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; we have to allocate a virtual register to compute it.
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; A later run of the the register scavenger won't find an available register
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; either so it will have to spill one to the emergency spill slot.
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PseudoCALL target-flags(riscv-plt) @foo, csr_ilp32_lp64, implicit-def $x1, implicit-def $x2, implicit $x1, implicit $x5, implicit $x6, implicit $x7, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $x28, implicit $x29, implicit $x30, implicit $x31
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PseudoRET
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...
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