113 lines
4.1 KiB
LLVM
113 lines
4.1 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
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; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \
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; RUN: FileCheck %s
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; Function Attrs: norecurse nounwind readnone
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define <4 x i32> @test_xxsplti32dx_1(<4 x i32> %a) {
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; CHECK-LABEL: test_xxsplti32dx_1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxsplti32dx vs34, 0, 566
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; CHECK-NEXT: blr
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entry:
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%vecins1 = shufflevector <4 x i32> %a, <4 x i32> <i32 undef, i32 566, i32 undef, i32 566>, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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ret <4 x i32> %vecins1
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}
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; Function Attrs: norecurse nounwind readnone
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define <4 x i32> @test_xxsplti32dx_2(<4 x i32> %a) {
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; CHECK-LABEL: test_xxsplti32dx_2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxsplti32dx vs34, 1, 33
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; CHECK-NEXT: blr
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entry:
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%vecins1 = shufflevector <4 x i32> <i32 33, i32 undef, i32 33, i32 undef>, <4 x i32> %a, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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ret <4 x i32> %vecins1
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}
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; Function Attrs: norecurse nounwind readnone
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define <4 x i32> @test_xxsplti32dx_3(<4 x i32> %a) {
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; CHECK-LABEL: test_xxsplti32dx_3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxsplti32dx vs34, 0, 12
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; CHECK-NEXT: blr
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entry:
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%vecins1 = shufflevector <4 x i32> %a, <4 x i32> <i32 undef, i32 12, i32 undef, i32 12>, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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ret <4 x i32> %vecins1
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}
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; Function Attrs: norecurse nounwind readnone
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define <4 x i32> @test_xxsplti32dx_4(<4 x i32> %a) {
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; CHECK-LABEL: test_xxsplti32dx_4:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxsplti32dx vs34, 1, -683
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; CHECK-NEXT: blr
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entry:
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%vecins1 = shufflevector <4 x i32> <i32 -683, i32 undef, i32 -683, i32 undef>, <4 x i32> %a, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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ret <4 x i32> %vecins1
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}
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; Function Attrs: nounwind
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define <4 x float> @test_xxsplti32dx_5(<4 x float> %vfa) {
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; CHECK-LABEL: test_xxsplti32dx_5:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxsplti32dx vs34, 0, 1065353216
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; CHECK-NEXT: blr
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entry:
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%vecins3.i = shufflevector <4 x float> %vfa, <4 x float> <float undef, float 1.000000e+00, float undef, float 1.000000e+00>, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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ret <4 x float> %vecins3.i
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}
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; Function Attrs: nounwind
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define <4 x float> @test_xxsplti32dx_6(<4 x float> %vfa) {
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; CHECK-LABEL: test_xxsplti32dx_6:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxsplti32dx vs34, 1, 1073741824
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; CHECK-NEXT: blr
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entry:
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%vecins3.i = shufflevector <4 x float> <float 2.000000e+00, float undef, float 2.000000e+00, float undef>, <4 x float> %vfa, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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ret <4 x float> %vecins3.i
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}
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; Function Attrs: norecurse nounwind readnone
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; Test to illustrate when the splat is narrower than 32-bits.
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define dso_local <4 x i32> @test_xxsplti32dx_7(<4 x i32> %a) local_unnamed_addr #0 {
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; CHECK-LABEL: test_xxsplti32dx_7:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxsplti32dx vs34, 1, -1414812757
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; CHECK-NEXT: blr
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entry:
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%vecins1 = shufflevector <4 x i32> <i32 -1414812757, i32 undef, i32 -1414812757, i32 undef>, <4 x i32> %a, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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ret <4 x i32> %vecins1
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}
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define dso_local <2 x double> @test_xxsplti32dx_8() {
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; CHECK-LABEL: test_xxsplti32dx_8:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxsplti32dx vs34, 0, 1082660167
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; CHECK-NEXT: xxsplti32dx vs34, 1, -1374389535
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; CHECK-NEXT: blr
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entry:
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ret <2 x double> <double 0x40881547AE147AE1, double 0x40881547AE147AE1>
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}
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define dso_local <8 x i16> @test_xxsplti32dx_9() {
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; CHECK-LABEL: test_xxsplti32dx_9:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxsplti32dx vs34, 0, 23855277
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; CHECK-NEXT: xxsplti32dx vs34, 1, 65827
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; CHECK-NEXT: blr
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entry:
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ret <8 x i16> <i16 291, i16 undef, i16 undef, i16 364, i16 undef, i16 1, i16 173, i16 undef>
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}
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define dso_local <16 x i8> @constSplatBug() {
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; CHECK-LABEL: constSplatBug:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxlxor vs34, vs34, vs34
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; CHECK-NEXT: xxsplti32dx vs34, 0, 1191182336
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; CHECK-NEXT: blr
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entry:
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ret <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 71, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 71>
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}
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