llvm-for-llvmta/test/CodeGen/PowerPC/builtins-ppc-p9-darn.ll

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2022-04-25 10:02:23 +02:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -verify-machineinstrs -mtriple powerpc64le -mcpu=pwr9 | FileCheck %s
; RUN: llc < %s -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -vec-extabi -mcpu=pwr9 | FileCheck %s
define i64 @raw() {
; CHECK-LABEL: raw:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: darn 3, 2
; CHECK-NEXT: blr
entry:
%0 = call i64 @llvm.ppc.darnraw()
ret i64 %0
}
define i64 @conditioned() {
; CHECK-LABEL: conditioned:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: darn 3, 1
; CHECK-NEXT: blr
entry:
%0 = call i64 @llvm.ppc.darn()
ret i64 %0
}
define signext i32 @word() {
; CHECK-LABEL: word:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: darn 3, 0
; CHECK-NEXT: extsw 3, 3
; CHECK-NEXT: blr
entry:
%0 = call i32 @llvm.ppc.darn32()
ret i32 %0
}
declare i64 @llvm.ppc.darn()
declare i64 @llvm.ppc.darnraw()
declare i32 @llvm.ppc.darn32()