57 lines
1.9 KiB
LLVM
57 lines
1.9 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -verify-machineinstrs -mtriple=armv8.6a-arm-none-eabi -mattr=+neon,+bf16,+fullfp16 | FileCheck %s
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declare bfloat @llvm.arm.neon.vcvtbfp2bf(float)
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; Hard float ABI
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declare <4 x bfloat> @llvm.arm.neon.vcvtfp2bf.v4bf16(<4 x float>)
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define arm_aapcs_vfpcc <4 x bfloat> @test_vcvt_bf16_f32_hardfp(<4 x float> %a) {
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; CHECK-LABEL: test_vcvt_bf16_f32_hardfp:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vcvt.bf16.f32 d0, q0
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; CHECK-NEXT: bx lr
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entry:
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%vcvtfp2bf1.i.i = call <4 x bfloat> @llvm.arm.neon.vcvtfp2bf.v4bf16(<4 x float> %a)
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ret <4 x bfloat> %vcvtfp2bf1.i.i
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}
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define arm_aapcs_vfpcc bfloat @test_vcvth_bf16_f32_hardfp(float %a) {
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; CHECK-LABEL: test_vcvth_bf16_f32_hardfp:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vcvtb.bf16.f32 s0, s0
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; CHECK-NEXT: bx lr
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entry:
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%vcvtbfp2bf.i = call bfloat @llvm.arm.neon.vcvtbfp2bf(float %a)
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ret bfloat %vcvtbfp2bf.i
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}
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; Soft float ABI
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declare <4 x i16> @llvm.arm.neon.vcvtfp2bf.v4i16(<4 x float>)
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define <2 x i32> @test_vcvt_bf16_f32_softfp(<4 x float> %a) {
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; CHECK-LABEL: test_vcvt_bf16_f32_softfp:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmov d17, r2, r3
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; CHECK-NEXT: vmov d16, r0, r1
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; CHECK-NEXT: vcvt.bf16.f32 d16, q8
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; CHECK-NEXT: vmov r0, r1, d16
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; CHECK-NEXT: bx lr
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entry:
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%vcvtfp2bf1.i.i = call <4 x i16> @llvm.arm.neon.vcvtfp2bf.v4i16(<4 x float> %a)
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%.cast = bitcast <4 x i16> %vcvtfp2bf1.i.i to <2 x i32>
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ret <2 x i32> %.cast
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}
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define bfloat @test_vcvth_bf16_f32_softfp(float %a) #1 {
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; CHECK-LABEL: test_vcvth_bf16_f32_softfp:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmov s0, r0
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; CHECK-NEXT: vcvtb.bf16.f32 s0, s0
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; CHECK-NEXT: vmov r0, s0
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; CHECK-NEXT: bx lr
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entry:
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%vcvtbfp2bf.i = call bfloat @llvm.arm.neon.vcvtbfp2bf(float %a) #3
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ret bfloat %vcvtbfp2bf.i
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}
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