41 lines
1.1 KiB
Plaintext
41 lines
1.1 KiB
Plaintext
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# RUN: llc -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs -run-pass=greedy -stress-regalloc=2 %s -o - | FileCheck -check-prefix=GCN %s
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# Make sure there's no verifier error after register allocation
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# introduces vreg defs when the MIR parser infers SSA.
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---
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name: ra_introduces_vreg_def
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tracksRegLiveness: true
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machineFunctionInfo:
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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frameOffsetReg: '$sgpr33'
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stackPtrOffsetReg: '$sgpr32'
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argumentInfo:
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privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
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body: |
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; GCN-LABEL: name: ra_introduces_vreg_def
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; GCN: [[COPY_V0:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[COPY_V0]]:vgpr_32 =
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bb.0:
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liveins: $vgpr0, $vgpr1
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%0:vgpr_32 = COPY $vgpr0
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%1:vgpr_32 = COPY $vgpr1
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S_NOP 0, implicit %0
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S_NOP 0, implicit %1
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bb.1:
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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$vgpr1 = V_MOV_B32_e32 1, implicit $exec
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S_NOP 0, implicit %0
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S_NOP 0, implicit %1
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bb.2:
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S_CBRANCH_EXECNZ %bb.1, implicit $exec
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bb.3:
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$exec_lo = S_OR_B32 $exec_lo, undef $sgpr4, implicit-def $scc
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$vgpr0 = COPY %0
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S_SETPC_B64_return undef $sgpr30_sgpr31, implicit $vgpr0
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...
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