28 lines
981 B
LLVM
28 lines
981 B
LLVM
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; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; GCN-LABEL: {{^}}and_i1_sext_bool:
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; GCN: v_cmp_{{gt|le}}_u32_e{{32|64}} [[CC:[^,]+]], v{{[0-9]+}}, v{{[0-9]+}}
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; GCN: v_cndmask_b32_e{{32|64}} [[VAL:v[0-9]+]], 0, v{{[0-9]+}}, [[CC]]
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; GCN: store_dword {{.*}}[[VAL]]
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; GCN-NOT: v_cndmask_b32_e64 v{{[0-9]+}}, {{0|-1}}, {{0|-1}}
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; GCN-NOT: v_and_b32_e32
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define amdgpu_kernel void @and_i1_sext_bool(i32 addrspace(1)* nocapture %arg) {
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bb:
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%x = tail call i32 @llvm.amdgcn.workitem.id.x()
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%y = tail call i32 @llvm.amdgcn.workitem.id.y()
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%gep = getelementptr inbounds i32, i32 addrspace(1)* %arg, i32 %x
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%v = load i32, i32 addrspace(1)* %gep, align 4
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%cmp = icmp ugt i32 %x, %y
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%ext = sext i1 %cmp to i32
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%and = and i32 %v, %ext
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store i32 %and, i32 addrspace(1)* %gep, align 4
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #0
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declare i32 @llvm.amdgcn.workitem.id.y() #0
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attributes #0 = { nounwind readnone speculatable }
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