llvm-for-llvmta/test/CodeGen/AMDGPU/GlobalISel/regbankselect-default.mir

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2022-04-25 10:02:23 +02:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -march amdgcn -mcpu=fiji -run-pass=regbankselect %s -o - | FileCheck %s
# Check the default mappings for various instructions.
---
name: test_fconstant_f32_1
legalized: true
body: |
bb.0:
; CHECK-LABEL: name: test_fconstant_f32_1
; CHECK: [[C:%[0-9]+]]:sgpr(s32) = G_FCONSTANT float 1.000000e+00
%0:_(s32) = G_FCONSTANT float 1.0
...
---
name: test_fconstant_f64_1
legalized: true
body: |
bb.0:
; CHECK-LABEL: name: test_fconstant_f64_1
; CHECK: [[C:%[0-9]+]]:sgpr(s64) = G_FCONSTANT double 1.000000e+00
%0:_(s64) = G_FCONSTANT double 1.0
...
---
name: test_fconstant_f16_1
legalized: true
body: |
bb.0:
; CHECK-LABEL: name: test_fconstant_f16_1
; CHECK: [[C:%[0-9]+]]:sgpr(s16) = G_FCONSTANT half 0xH3C00
; CHECK: [[ANYEXT:%[0-9]+]]:sgpr(s32) = G_ANYEXT [[C]](s16)
%0:_(s16) = G_FCONSTANT half 1.0
%1:_(s32) = G_ANYEXT %0
...
---
name: test_implicit_def_s32
legalized: true
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_s32
; CHECK: [[DEF:%[0-9]+]]:sgpr(s32) = G_IMPLICIT_DEF
%0:_(s32) = G_IMPLICIT_DEF
...
---
name: test_implicit_def_s64
legalized: true
body: |
bb.0:
; CHECK-LABEL: name: test_implicit_def_s64
; CHECK: [[DEF:%[0-9]+]]:sgpr(s64) = G_IMPLICIT_DEF
%0:_(s64) = G_IMPLICIT_DEF
...