289 lines
16 KiB
LLVM
289 lines
16 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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; RUN: llc -global-isel -march=amdgcn -O0 -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s
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; Size operand should be the minimum of the two pointer sizes.
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define void @test_memcpy_p1_p3_i64(i8 addrspace(1)* %dst, i8 addrspace(3)* %src) {
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; CHECK-LABEL: name: test_memcpy_p1_p3_i64
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; CHECK: bb.1 (%ir-block.0):
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:_(p3) = COPY $vgpr2
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; CHECK: [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
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; CHECK: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 256
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; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)
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; CHECK: G_MEMCPY [[MV]](p1), [[COPY2]](p3), [[TRUNC]](s32), 0 :: (store 1 into %ir.dst, addrspace 1), (load 1 from %ir.src, addrspace 3)
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; CHECK: [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
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; CHECK: S_SETPC_B64_return [[COPY4]]
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call void @llvm.memcpy.p1i8.p3i8.i64(i8 addrspace(1)* %dst, i8 addrspace(3)* %src, i64 256, i1 false)
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ret void
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}
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define void @test_memcpy_p1_p3_i32(i8 addrspace(1)* %dst, i8 addrspace(3)* %src) {
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; CHECK-LABEL: name: test_memcpy_p1_p3_i32
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; CHECK: bb.1 (%ir-block.0):
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:_(p3) = COPY $vgpr2
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; CHECK: [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
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; CHECK: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 256
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; CHECK: G_MEMCPY [[MV]](p1), [[COPY2]](p3), [[C]](s32), 0 :: (store 1 into %ir.dst, addrspace 1), (load 1 from %ir.src, addrspace 3)
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; CHECK: [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
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; CHECK: S_SETPC_B64_return [[COPY4]]
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call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %dst, i8 addrspace(3)* %src, i32 256, i1 false)
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ret void
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}
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define void @test_memcpy_p1_p3_i16(i8 addrspace(1)* %dst, i8 addrspace(3)* %src) {
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; CHECK-LABEL: name: test_memcpy_p1_p3_i16
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; CHECK: bb.1 (%ir-block.0):
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:_(p3) = COPY $vgpr2
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; CHECK: [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
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; CHECK: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
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; CHECK: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 256
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; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[C]](s16)
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; CHECK: G_MEMCPY [[MV]](p1), [[COPY2]](p3), [[ZEXT]](s32), 0 :: (store 1 into %ir.dst, addrspace 1), (load 1 from %ir.src, addrspace 3)
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; CHECK: [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
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; CHECK: S_SETPC_B64_return [[COPY4]]
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call void @llvm.memcpy.p1i8.p3i8.i16(i8 addrspace(1)* %dst, i8 addrspace(3)* %src, i16 256, i1 false)
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ret void
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}
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define void @test_memcpy_p3_p1_i64(i8 addrspace(3)* %dst, i8 addrspace(1)* %src) {
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; CHECK-LABEL: name: test_memcpy_p3_p1_i64
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; CHECK: bb.1 (%ir-block.0):
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
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; CHECK: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
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; CHECK: [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
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; CHECK: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 256
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; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)
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; CHECK: G_MEMCPY [[COPY]](p3), [[MV]](p1), [[TRUNC]](s32), 0 :: (store 1 into %ir.dst, addrspace 3), (load 1 from %ir.src, addrspace 1)
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; CHECK: [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
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; CHECK: S_SETPC_B64_return [[COPY4]]
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call void @llvm.memcpy.p3i8.p1i8.i64(i8 addrspace(3)* %dst, i8 addrspace(1)* %src, i64 256, i1 false)
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ret void
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}
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define void @test_memcpy_p3_p1_i32(i8 addrspace(3)* %dst, i8 addrspace(1)* %src) {
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; CHECK-LABEL: name: test_memcpy_p3_p1_i32
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; CHECK: bb.1 (%ir-block.0):
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
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; CHECK: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
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; CHECK: [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
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; CHECK: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 256
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; CHECK: G_MEMCPY [[COPY]](p3), [[MV]](p1), [[C]](s32), 0 :: (store 1 into %ir.dst, addrspace 3), (load 1 from %ir.src, addrspace 1)
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; CHECK: [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
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; CHECK: S_SETPC_B64_return [[COPY4]]
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call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %dst, i8 addrspace(1)* %src, i32 256, i1 false)
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ret void
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}
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define void @test_memcpy_p3_p1_i16(i8 addrspace(3)* %dst, i8 addrspace(1)* %src) {
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; CHECK-LABEL: name: test_memcpy_p3_p1_i16
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; CHECK: bb.1 (%ir-block.0):
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
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; CHECK: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
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; CHECK: [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
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; CHECK: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)
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; CHECK: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 256
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; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[C]](s16)
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; CHECK: G_MEMCPY [[COPY]](p3), [[MV]](p1), [[ZEXT]](s32), 0 :: (store 1 into %ir.dst, addrspace 3), (load 1 from %ir.src, addrspace 1)
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; CHECK: [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
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; CHECK: S_SETPC_B64_return [[COPY4]]
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call void @llvm.memcpy.p3i8.p1i8.i16(i8 addrspace(3)* %dst, i8 addrspace(1)* %src, i16 256, i1 false)
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ret void
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}
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define void @test_memmove_p1_p3_i64(i8 addrspace(1)* %dst, i8 addrspace(3)* %src) {
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; CHECK-LABEL: name: test_memmove_p1_p3_i64
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; CHECK: bb.1 (%ir-block.0):
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:_(p3) = COPY $vgpr2
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; CHECK: [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
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; CHECK: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 256
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; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)
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; CHECK: G_MEMMOVE [[MV]](p1), [[COPY2]](p3), [[TRUNC]](s32), 0 :: (store 1 into %ir.dst, addrspace 1), (load 1 from %ir.src, addrspace 3)
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; CHECK: [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
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; CHECK: S_SETPC_B64_return [[COPY4]]
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call void @llvm.memmove.p1i8.p3i8.i64(i8 addrspace(1)* %dst, i8 addrspace(3)* %src, i64 256, i1 false)
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ret void
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}
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define void @test_memmove_p1_p3_i32(i8 addrspace(1)* %dst, i8 addrspace(3)* %src) {
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; CHECK-LABEL: name: test_memmove_p1_p3_i32
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; CHECK: bb.1 (%ir-block.0):
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:_(p3) = COPY $vgpr2
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; CHECK: [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
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; CHECK: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 256
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; CHECK: G_MEMMOVE [[MV]](p1), [[COPY2]](p3), [[C]](s32), 0 :: (store 1 into %ir.dst, addrspace 1), (load 1 from %ir.src, addrspace 3)
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; CHECK: [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
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; CHECK: S_SETPC_B64_return [[COPY4]]
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call void @llvm.memmove.p1i8.p3i8.i32(i8 addrspace(1)* %dst, i8 addrspace(3)* %src, i32 256, i1 false)
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ret void
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}
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define void @test_memmove_p1_p3_i16(i8 addrspace(1)* %dst, i8 addrspace(3)* %src) {
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; CHECK-LABEL: name: test_memmove_p1_p3_i16
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; CHECK: bb.1 (%ir-block.0):
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:_(p3) = COPY $vgpr2
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; CHECK: [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
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; CHECK: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
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; CHECK: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 256
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; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[C]](s16)
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; CHECK: G_MEMMOVE [[MV]](p1), [[COPY2]](p3), [[ZEXT]](s32), 0 :: (store 1 into %ir.dst, addrspace 1), (load 1 from %ir.src, addrspace 3)
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; CHECK: [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
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; CHECK: S_SETPC_B64_return [[COPY4]]
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call void @llvm.memmove.p1i8.p3i8.i16(i8 addrspace(1)* %dst, i8 addrspace(3)* %src, i16 256, i1 false)
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ret void
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}
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define void @test_memset_p1_i64(i8 addrspace(1)* %dst, i8 %val) {
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; CHECK-LABEL: name: test_memset_p1_i64
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; CHECK: bb.1 (%ir-block.0):
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
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; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY2]](s32)
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; CHECK: [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
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; CHECK: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 256
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; CHECK: G_MEMSET [[MV]](p1), [[TRUNC]](s8), [[C]](s64), 0 :: (store 1 into %ir.dst, addrspace 1)
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; CHECK: [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
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; CHECK: S_SETPC_B64_return [[COPY4]]
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call void @llvm.memset.p1i8.i64(i8 addrspace(1)* %dst, i8 %val, i64 256, i1 false)
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ret void
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}
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define void @test_memset_p1_i32(i8 addrspace(1)* %dst, i8 %val) {
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; CHECK-LABEL: name: test_memset_p1_i32
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; CHECK: bb.1 (%ir-block.0):
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
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; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY2]](s32)
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; CHECK: [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
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; CHECK: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 256
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; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[C]](s32)
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; CHECK: G_MEMSET [[MV]](p1), [[TRUNC]](s8), [[ZEXT]](s64), 0 :: (store 1 into %ir.dst, addrspace 1)
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; CHECK: [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
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; CHECK: S_SETPC_B64_return [[COPY4]]
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call void @llvm.memset.p1i8.i32(i8 addrspace(1)* %dst, i8 %val, i32 256, i1 false)
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ret void
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}
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define void @test_memset_p1_i16(i8 addrspace(1)* %dst, i8 %val) {
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; CHECK-LABEL: name: test_memset_p1_i16
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; CHECK: bb.1 (%ir-block.0):
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr30_sgpr31
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
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; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY2]](s32)
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; CHECK: [[COPY3:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
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; CHECK: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
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; CHECK: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 256
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; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[C]](s16)
|
||
|
|
; CHECK: G_MEMSET [[MV]](p1), [[TRUNC]](s8), [[ZEXT]](s64), 0 :: (store 1 into %ir.dst, addrspace 1)
|
||
|
|
; CHECK: [[COPY4:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY3]]
|
||
|
|
; CHECK: S_SETPC_B64_return [[COPY4]]
|
||
|
|
call void @llvm.memset.p1i8.i16(i8 addrspace(1)* %dst, i8 %val, i16 256, i1 false)
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @test_memset_p3_i64(i8 addrspace(3)* %dst, i8 %val) {
|
||
|
|
; CHECK-LABEL: name: test_memset_p3_i64
|
||
|
|
; CHECK: bb.1 (%ir-block.0):
|
||
|
|
; CHECK: liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||
|
|
; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
|
||
|
|
; CHECK: [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
|
||
|
|
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 256
|
||
|
|
; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)
|
||
|
|
; CHECK: G_MEMSET [[COPY]](p3), [[TRUNC]](s8), [[TRUNC1]](s32), 0 :: (store 1 into %ir.dst, addrspace 3)
|
||
|
|
; CHECK: [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
|
||
|
|
; CHECK: S_SETPC_B64_return [[COPY3]]
|
||
|
|
call void @llvm.memset.p3i8.i64(i8 addrspace(3)* %dst, i8 %val, i64 256, i1 false)
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @test_memset_p3_i32(i8 addrspace(3)* %dst, i8 %val) {
|
||
|
|
; CHECK-LABEL: name: test_memset_p3_i32
|
||
|
|
; CHECK: bb.1 (%ir-block.0):
|
||
|
|
; CHECK: liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||
|
|
; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
|
||
|
|
; CHECK: [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
|
||
|
|
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 256
|
||
|
|
; CHECK: G_MEMSET [[COPY]](p3), [[TRUNC]](s8), [[C]](s32), 0 :: (store 1 into %ir.dst, addrspace 3)
|
||
|
|
; CHECK: [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
|
||
|
|
; CHECK: S_SETPC_B64_return [[COPY3]]
|
||
|
|
call void @llvm.memset.p3i8.i32(i8 addrspace(3)* %dst, i8 %val, i32 256, i1 false)
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @test_memset_p3_i16(i8 addrspace(3)* %dst, i8 %val) {
|
||
|
|
; CHECK-LABEL: name: test_memset_p3_i16
|
||
|
|
; CHECK: bb.1 (%ir-block.0):
|
||
|
|
; CHECK: liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||
|
|
; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
|
||
|
|
; CHECK: [[COPY2:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31
|
||
|
|
; CHECK: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 256
|
||
|
|
; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[C]](s16)
|
||
|
|
; CHECK: G_MEMSET [[COPY]](p3), [[TRUNC]](s8), [[ZEXT]](s32), 0 :: (store 1 into %ir.dst, addrspace 3)
|
||
|
|
; CHECK: [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY2]]
|
||
|
|
; CHECK: S_SETPC_B64_return [[COPY3]]
|
||
|
|
call void @llvm.memset.p3i8.i16(i8 addrspace(3)* %dst, i8 %val, i16 256, i1 false)
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
declare void @llvm.memcpy.p1i8.p3i8.i64(i8 addrspace(1)* noalias nocapture writeonly, i8 addrspace(3)* noalias nocapture readonly, i64, i1 immarg) #0
|
||
|
|
declare void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* noalias nocapture writeonly, i8 addrspace(3)* noalias nocapture readonly, i32, i1 immarg) #0
|
||
|
|
declare void @llvm.memcpy.p1i8.p3i8.i16(i8 addrspace(1)* noalias nocapture writeonly, i8 addrspace(3)* noalias nocapture readonly, i16, i1 immarg) #0
|
||
|
|
declare void @llvm.memcpy.p3i8.p1i8.i64(i8 addrspace(3)* noalias nocapture writeonly, i8 addrspace(1)* noalias nocapture readonly, i64, i1 immarg) #0
|
||
|
|
declare void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* noalias nocapture writeonly, i8 addrspace(1)* noalias nocapture readonly, i32, i1 immarg) #0
|
||
|
|
declare void @llvm.memcpy.p3i8.p1i8.i16(i8 addrspace(3)* noalias nocapture writeonly, i8 addrspace(1)* noalias nocapture readonly, i16, i1 immarg) #0
|
||
|
|
declare void @llvm.memmove.p1i8.p3i8.i64(i8 addrspace(1)* nocapture, i8 addrspace(3)* nocapture readonly, i64, i1 immarg) #0
|
||
|
|
declare void @llvm.memmove.p1i8.p3i8.i32(i8 addrspace(1)* nocapture, i8 addrspace(3)* nocapture readonly, i32, i1 immarg) #0
|
||
|
|
declare void @llvm.memmove.p1i8.p3i8.i16(i8 addrspace(1)* nocapture, i8 addrspace(3)* nocapture readonly, i16, i1 immarg) #0
|
||
|
|
declare void @llvm.memset.p1i8.i64(i8 addrspace(1)* nocapture writeonly, i8, i64, i1 immarg) #1
|
||
|
|
declare void @llvm.memset.p1i8.i32(i8 addrspace(1)* nocapture writeonly, i8, i32, i1 immarg) #1
|
||
|
|
declare void @llvm.memset.p1i8.i16(i8 addrspace(1)* nocapture writeonly, i8, i16, i1 immarg) #1
|
||
|
|
declare void @llvm.memset.p3i8.i64(i8 addrspace(3)* nocapture writeonly, i8, i64, i1 immarg) #1
|
||
|
|
declare void @llvm.memset.p3i8.i32(i8 addrspace(3)* nocapture writeonly, i8, i32, i1 immarg) #1
|
||
|
|
declare void @llvm.memset.p3i8.i16(i8 addrspace(3)* nocapture writeonly, i8, i16, i1 immarg) #1
|
||
|
|
|
||
|
|
attributes #0 = { argmemonly nounwind willreturn }
|
||
|
|
attributes #1 = { argmemonly nounwind willreturn writeonly }
|