75 lines
3.5 KiB
LLVM
75 lines
3.5 KiB
LLVM
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s
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; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
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; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
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; WARN-NOT: warning
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;
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; ST1B, ST1W, ST1H, ST1D: base + 64-bit unscaled offset
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; e.g. st1h { z0.d }, p0, [x0, z1.d]
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;
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define void @sst1b_d(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, i8* %base, <vscale x 2 x i64> %b) {
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; CHECK-LABEL: sst1b_d:
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; CHECK: st1b { z0.d }, p0, [x0, z1.d]
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; CHECK-NEXT: ret
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%data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i8>
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call void @llvm.aarch64.sve.st1.scatter.nxv2i8(<vscale x 2 x i8> %data_trunc,
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<vscale x 2 x i1> %pg,
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i8* %base,
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<vscale x 2 x i64> %b)
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ret void
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}
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define void @sst1h_d(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, i16* %base, <vscale x 2 x i64> %b) {
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; CHECK-LABEL: sst1h_d:
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; CHECK: st1h { z0.d }, p0, [x0, z1.d]
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; CHECK-NEXT: ret
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%data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
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call void @llvm.aarch64.sve.st1.scatter.nxv2i16(<vscale x 2 x i16> %data_trunc,
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<vscale x 2 x i1> %pg,
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i16* %base,
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<vscale x 2 x i64> %b)
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ret void
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}
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define void @sst1w_d(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, i32* %base, <vscale x 2 x i64> %b) {
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; CHECK-LABEL: sst1w_d:
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; CHECK: st1w { z0.d }, p0, [x0, z1.d]
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; CHECK-NEXT: ret
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%data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
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call void @llvm.aarch64.sve.st1.scatter.nxv2i32(<vscale x 2 x i32> %data_trunc,
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<vscale x 2 x i1> %pg,
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i32* %base,
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<vscale x 2 x i64> %b)
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ret void
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}
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define void @sst1d_d(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, i64* %base, <vscale x 2 x i64> %b) {
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; CHECK-LABEL: sst1d_d:
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; CHECK: st1d { z0.d }, p0, [x0, z1.d]
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; CHECK-NEXT: ret
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call void @llvm.aarch64.sve.st1.scatter.nxv2i64(<vscale x 2 x i64> %data,
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<vscale x 2 x i1> %pg,
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i64* %base,
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<vscale x 2 x i64> %b)
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ret void
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}
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define void @sst1d_d_double(<vscale x 2 x double> %data, <vscale x 2 x i1> %pg, double* %base, <vscale x 2 x i64> %b) {
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; CHECK-LABEL: sst1d_d_double:
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; CHECK: st1d { z0.d }, p0, [x0, z1.d]
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; CHECK-NEXT: ret
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call void @llvm.aarch64.sve.st1.scatter.nxv2f64(<vscale x 2 x double> %data,
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<vscale x 2 x i1> %pg,
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double* %base,
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<vscale x 2 x i64> %b)
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ret void
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}
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declare void @llvm.aarch64.sve.st1.scatter.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x i1>, i8*, <vscale x 2 x i64>)
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declare void @llvm.aarch64.sve.st1.scatter.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x i1>, i16*, <vscale x 2 x i64>)
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declare void @llvm.aarch64.sve.st1.scatter.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i1>, i32*, <vscale x 2 x i64>)
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declare void @llvm.aarch64.sve.st1.scatter.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i1>, i64*, <vscale x 2 x i64>)
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declare void @llvm.aarch64.sve.st1.scatter.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, double*, <vscale x 2 x i64>)
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