99 lines
2.7 KiB
LLVM
99 lines
2.7 KiB
LLVM
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; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -mcpu=cyclone -mattr=+slow-misaligned-128store | FileCheck %s
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%struct.X = type <{ i32, i64, i64 }>
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define void @foo1(i32* %p, i64 %val) nounwind {
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; CHECK-LABEL: foo1:
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; CHECK: stur w1, [x0, #-4]
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; CHECK-NEXT: ret
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%tmp1 = trunc i64 %val to i32
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%ptr = getelementptr inbounds i32, i32* %p, i64 -1
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store i32 %tmp1, i32* %ptr, align 4
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ret void
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}
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define void @foo2(i16* %p, i64 %val) nounwind {
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; CHECK-LABEL: foo2:
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; CHECK: sturh w1, [x0, #-2]
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; CHECK-NEXT: ret
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%tmp1 = trunc i64 %val to i16
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%ptr = getelementptr inbounds i16, i16* %p, i64 -1
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store i16 %tmp1, i16* %ptr, align 2
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ret void
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}
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define void @foo3(i8* %p, i64 %val) nounwind {
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; CHECK-LABEL: foo3:
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; CHECK: sturb w1, [x0, #-1]
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; CHECK-NEXT: ret
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%tmp1 = trunc i64 %val to i8
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%ptr = getelementptr inbounds i8, i8* %p, i64 -1
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store i8 %tmp1, i8* %ptr, align 1
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ret void
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}
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define void @foo4(i16* %p, i32 %val) nounwind {
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; CHECK-LABEL: foo4:
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; CHECK: sturh w1, [x0, #-2]
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; CHECK-NEXT: ret
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%tmp1 = trunc i32 %val to i16
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%ptr = getelementptr inbounds i16, i16* %p, i32 -1
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store i16 %tmp1, i16* %ptr, align 2
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ret void
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}
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define void @foo5(i8* %p, i32 %val) nounwind {
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; CHECK-LABEL: foo5:
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; CHECK: sturb w1, [x0, #-1]
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; CHECK-NEXT: ret
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%tmp1 = trunc i32 %val to i8
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%ptr = getelementptr inbounds i8, i8* %p, i32 -1
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store i8 %tmp1, i8* %ptr, align 1
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ret void
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}
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define void @foo(%struct.X* nocapture %p) nounwind optsize ssp {
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; CHECK-LABEL: foo:
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; CHECK-NOT: str
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; CHECK: stur xzr, [x0, #12]
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; CHECK-NEXT: stur xzr, [x0, #4]
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; CHECK-NEXT: ret
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%B = getelementptr inbounds %struct.X, %struct.X* %p, i64 0, i32 1
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%val = bitcast i64* %B to i8*
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call void @llvm.memset.p0i8.i64(i8* %val, i8 0, i64 16, i1 false)
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ret void
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}
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind
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; Unaligned 16b stores are split into 8b stores for performance.
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; radar://15424193
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; CHECK-LABEL: unaligned:
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; CHECK-NOT: str q0
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; CHECK: str d[[REG:[0-9]+]], [x0]
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; CHECK: ext.16b v[[REG2:[0-9]+]], v[[REG]], v[[REG]], #8
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; CHECK: str d[[REG2]], [x0, #8]
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define void @unaligned(<4 x i32>* %p, <4 x i32> %v) nounwind {
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store <4 x i32> %v, <4 x i32>* %p, align 4
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ret void
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}
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; CHECK-LABEL: aligned:
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; CHECK: str q0
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define void @aligned(<4 x i32>* %p, <4 x i32> %v) nounwind {
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store <4 x i32> %v, <4 x i32>* %p
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ret void
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}
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; Don't split one and two byte aligned stores.
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; radar://16349308
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; CHECK-LABEL: twobytealign:
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; CHECK: str q0
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define void @twobytealign(<4 x i32>* %p, <4 x i32> %v) nounwind {
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store <4 x i32> %v, <4 x i32>* %p, align 2
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ret void
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}
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; CHECK-LABEL: onebytealign:
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; CHECK: str q0
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define void @onebytealign(<4 x i32>* %p, <4 x i32> %v) nounwind {
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store <4 x i32> %v, <4 x i32>* %p, align 1
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ret void
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}
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