78 lines
2.7 KiB
C++
78 lines
2.7 KiB
C++
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//===-- ARMBaseInfo.cpp - ARM Base encoding information------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides basic encoding and assembly information for ARM.
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//
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//===----------------------------------------------------------------------===//
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#include "ARMBaseInfo.h"
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/SmallVector.h"
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using namespace llvm;
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namespace llvm {
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ARM::PredBlockMask expandPredBlockMask(ARM::PredBlockMask BlockMask,
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ARMVCC::VPTCodes Kind) {
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using PredBlockMask = ARM::PredBlockMask;
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assert(Kind != ARMVCC::None && "Cannot expand a mask with None!");
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assert(countTrailingZeros((unsigned)BlockMask) != 0 &&
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"Mask is already full");
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auto ChooseMask = [&](PredBlockMask AddedThen, PredBlockMask AddedElse) {
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return Kind == ARMVCC::Then ? AddedThen : AddedElse;
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};
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switch (BlockMask) {
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case PredBlockMask::T:
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return ChooseMask(PredBlockMask::TT, PredBlockMask::TE);
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case PredBlockMask::TT:
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return ChooseMask(PredBlockMask::TTT, PredBlockMask::TTE);
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case PredBlockMask::TE:
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return ChooseMask(PredBlockMask::TET, PredBlockMask::TEE);
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case PredBlockMask::TTT:
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return ChooseMask(PredBlockMask::TTTT, PredBlockMask::TTTE);
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case PredBlockMask::TTE:
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return ChooseMask(PredBlockMask::TTET, PredBlockMask::TTEE);
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case PredBlockMask::TET:
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return ChooseMask(PredBlockMask::TETT, PredBlockMask::TETE);
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case PredBlockMask::TEE:
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return ChooseMask(PredBlockMask::TEET, PredBlockMask::TEEE);
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default:
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llvm_unreachable("Unknown Mask");
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}
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}
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namespace ARMSysReg {
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// lookup system register using 12-bit SYSm value.
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// Note: the search is uniqued using M1 mask
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const MClassSysReg *lookupMClassSysRegBy12bitSYSmValue(unsigned SYSm) {
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return lookupMClassSysRegByM1Encoding12(SYSm);
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}
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// returns APSR with _<bits> qualifier.
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// Note: ARMv7-M deprecates using MSR APSR without a _<bits> qualifier
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const MClassSysReg *lookupMClassSysRegAPSRNonDeprecated(unsigned SYSm) {
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return lookupMClassSysRegByM2M3Encoding8((1<<9)|(SYSm & 0xFF));
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}
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// lookup system registers using 8-bit SYSm value
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const MClassSysReg *lookupMClassSysRegBy8bitSYSmValue(unsigned SYSm) {
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return ARMSysReg::lookupMClassSysRegByM2M3Encoding8((1<<8)|(SYSm & 0xFF));
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}
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#define GET_MCLASSSYSREG_IMPL
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#include "ARMGenSystemRegister.inc"
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} // end namespace ARMSysReg
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namespace ARMBankedReg {
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#define GET_BANKEDREG_IMPL
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#include "ARMGenSystemRegister.inc"
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} // end namespce ARMSysReg
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} // end namespace llvm
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