511 lines
19 KiB
C++
511 lines
19 KiB
C++
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//===-- ARMMachObjectWriter.cpp - ARM Mach Object Writer ------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/ARMBaseInfo.h"
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#include "MCTargetDesc/ARMFixupKinds.h"
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#include "MCTargetDesc/ARMMCTargetDesc.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/BinaryFormat/MachO.h"
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#include "llvm/MC/MCAsmLayout.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCFixup.h"
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#include "llvm/MC/MCFixupKindInfo.h"
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#include "llvm/MC/MCMachObjectWriter.h"
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#include "llvm/MC/MCSection.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/ScopedPrinter.h"
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using namespace llvm;
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namespace {
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class ARMMachObjectWriter : public MCMachObjectTargetWriter {
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void RecordARMScatteredRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup,
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MCValue Target,
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unsigned Type,
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unsigned Log2Size,
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uint64_t &FixedValue);
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void RecordARMScatteredHalfRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup, MCValue Target,
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uint64_t &FixedValue);
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bool requiresExternRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCFragment &Fragment, unsigned RelocType,
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const MCSymbol &S, uint64_t FixedValue);
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public:
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ARMMachObjectWriter(bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype)
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: MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
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void recordRelocation(MachObjectWriter *Writer, MCAssembler &Asm,
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const MCAsmLayout &Layout, const MCFragment *Fragment,
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const MCFixup &Fixup, MCValue Target,
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uint64_t &FixedValue) override;
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};
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}
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static bool getARMFixupKindMachOInfo(unsigned Kind, unsigned &RelocType,
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unsigned &Log2Size) {
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RelocType = unsigned(MachO::ARM_RELOC_VANILLA);
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Log2Size = ~0U;
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switch (Kind) {
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default:
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return false;
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case FK_Data_1:
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Log2Size = llvm::Log2_32(1);
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return true;
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case FK_Data_2:
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Log2Size = llvm::Log2_32(2);
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return true;
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case FK_Data_4:
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Log2Size = llvm::Log2_32(4);
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return true;
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case FK_Data_8:
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Log2Size = llvm::Log2_32(8);
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return true;
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// These fixups are expected to always be resolvable at assembly time and
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// have no relocations supported.
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case ARM::fixup_arm_ldst_pcrel_12:
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case ARM::fixup_arm_pcrel_10:
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case ARM::fixup_arm_adr_pcrel_12:
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case ARM::fixup_arm_thumb_br:
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return false;
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// Handle 24-bit branch kinds.
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case ARM::fixup_arm_condbranch:
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case ARM::fixup_arm_uncondbranch:
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case ARM::fixup_arm_uncondbl:
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case ARM::fixup_arm_condbl:
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case ARM::fixup_arm_blx:
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RelocType = unsigned(MachO::ARM_RELOC_BR24);
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// Report as 'long', even though that is not quite accurate.
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Log2Size = llvm::Log2_32(4);
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return true;
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case ARM::fixup_t2_uncondbranch:
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case ARM::fixup_arm_thumb_bl:
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case ARM::fixup_arm_thumb_blx:
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RelocType = unsigned(MachO::ARM_THUMB_RELOC_BR22);
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Log2Size = llvm::Log2_32(4);
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return true;
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// For movw/movt r_type relocations they always have a pair following them and
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// the r_length bits are used differently. The encoding of the r_length is as
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// follows:
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// low bit of r_length:
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// 0 - :lower16: for movw instructions
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// 1 - :upper16: for movt instructions
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// high bit of r_length:
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// 0 - arm instructions
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// 1 - thumb instructions
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case ARM::fixup_arm_movt_hi16:
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RelocType = unsigned(MachO::ARM_RELOC_HALF);
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Log2Size = 1;
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return true;
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case ARM::fixup_t2_movt_hi16:
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RelocType = unsigned(MachO::ARM_RELOC_HALF);
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Log2Size = 3;
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return true;
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case ARM::fixup_arm_movw_lo16:
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RelocType = unsigned(MachO::ARM_RELOC_HALF);
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Log2Size = 0;
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return true;
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case ARM::fixup_t2_movw_lo16:
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RelocType = unsigned(MachO::ARM_RELOC_HALF);
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Log2Size = 2;
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return true;
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}
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}
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void ARMMachObjectWriter::
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RecordARMScatteredHalfRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup,
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MCValue Target,
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uint64_t &FixedValue) {
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uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
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if (FixupOffset & 0xff000000) {
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Asm.getContext().reportError(Fixup.getLoc(),
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"can not encode offset '0x" +
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to_hexString(FixupOffset) +
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"' in resulting scattered relocation.");
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return;
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}
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unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
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unsigned Type = MachO::ARM_RELOC_HALF;
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// See <reloc.h>.
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const MCSymbol *A = &Target.getSymA()->getSymbol();
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if (!A->getFragment()) {
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Asm.getContext().reportError(Fixup.getLoc(),
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"symbol '" + A->getName() +
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"' can not be undefined in a subtraction expression");
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return;
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}
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uint32_t Value = Writer->getSymbolAddress(*A, Layout);
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uint32_t Value2 = 0;
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uint64_t SecAddr = Writer->getSectionAddress(A->getFragment()->getParent());
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FixedValue += SecAddr;
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if (const MCSymbolRefExpr *B = Target.getSymB()) {
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const MCSymbol *SB = &B->getSymbol();
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if (!SB->getFragment()) {
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Asm.getContext().reportError(Fixup.getLoc(),
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"symbol '" + B->getSymbol().getName() +
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"' can not be undefined in a subtraction expression");
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return;
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}
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// Select the appropriate difference relocation type.
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Type = MachO::ARM_RELOC_HALF_SECTDIFF;
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Value2 = Writer->getSymbolAddress(B->getSymbol(), Layout);
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FixedValue -= Writer->getSectionAddress(SB->getFragment()->getParent());
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}
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// Relocations are written out in reverse order, so the PAIR comes first.
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// ARM_RELOC_HALF and ARM_RELOC_HALF_SECTDIFF abuse the r_length field:
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//
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// For these two r_type relocations they always have a pair following them and
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// the r_length bits are used differently. The encoding of the r_length is as
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// follows:
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// low bit of r_length:
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// 0 - :lower16: for movw instructions
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// 1 - :upper16: for movt instructions
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// high bit of r_length:
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// 0 - arm instructions
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// 1 - thumb instructions
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// the other half of the relocated expression is in the following pair
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// relocation entry in the low 16 bits of r_address field.
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unsigned ThumbBit = 0;
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unsigned MovtBit = 0;
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switch (Fixup.getTargetKind()) {
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default: break;
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case ARM::fixup_arm_movt_hi16:
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MovtBit = 1;
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// The thumb bit shouldn't be set in the 'other-half' bit of the
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// relocation, but it will be set in FixedValue if the base symbol
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// is a thumb function. Clear it out here.
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if (Asm.isThumbFunc(A))
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FixedValue &= 0xfffffffe;
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break;
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case ARM::fixup_t2_movt_hi16:
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if (Asm.isThumbFunc(A))
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FixedValue &= 0xfffffffe;
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MovtBit = 1;
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LLVM_FALLTHROUGH;
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case ARM::fixup_t2_movw_lo16:
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ThumbBit = 1;
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break;
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}
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if (Type == MachO::ARM_RELOC_HALF_SECTDIFF) {
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uint32_t OtherHalf = MovtBit
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? (FixedValue & 0xffff) : ((FixedValue & 0xffff0000) >> 16);
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MachO::any_relocation_info MRE;
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MRE.r_word0 = ((OtherHalf << 0) |
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(MachO::ARM_RELOC_PAIR << 24) |
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(MovtBit << 28) |
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(ThumbBit << 29) |
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(IsPCRel << 30) |
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MachO::R_SCATTERED);
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MRE.r_word1 = Value2;
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Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
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}
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MachO::any_relocation_info MRE;
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MRE.r_word0 = ((FixupOffset << 0) |
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(Type << 24) |
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(MovtBit << 28) |
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(ThumbBit << 29) |
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(IsPCRel << 30) |
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MachO::R_SCATTERED);
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MRE.r_word1 = Value;
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Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
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}
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void ARMMachObjectWriter::RecordARMScatteredRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup,
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MCValue Target,
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unsigned Type,
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unsigned Log2Size,
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uint64_t &FixedValue) {
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uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
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if (FixupOffset & 0xff000000) {
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Asm.getContext().reportError(Fixup.getLoc(),
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"can not encode offset '0x" +
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to_hexString(FixupOffset) +
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"' in resulting scattered relocation.");
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return;
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}
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unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
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// See <reloc.h>.
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const MCSymbol *A = &Target.getSymA()->getSymbol();
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if (!A->getFragment()) {
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Asm.getContext().reportError(Fixup.getLoc(),
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"symbol '" + A->getName() +
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"' can not be undefined in a subtraction expression");
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return;
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}
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uint32_t Value = Writer->getSymbolAddress(*A, Layout);
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uint64_t SecAddr = Writer->getSectionAddress(A->getFragment()->getParent());
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FixedValue += SecAddr;
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uint32_t Value2 = 0;
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if (const MCSymbolRefExpr *B = Target.getSymB()) {
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assert(Type == MachO::ARM_RELOC_VANILLA && "invalid reloc for 2 symbols");
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const MCSymbol *SB = &B->getSymbol();
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if (!SB->getFragment()) {
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Asm.getContext().reportError(Fixup.getLoc(),
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"symbol '" + B->getSymbol().getName() +
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"' can not be undefined in a subtraction expression");
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return;
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}
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// Select the appropriate difference relocation type.
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Type = MachO::ARM_RELOC_SECTDIFF;
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Value2 = Writer->getSymbolAddress(B->getSymbol(), Layout);
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FixedValue -= Writer->getSectionAddress(SB->getFragment()->getParent());
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}
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// Relocations are written out in reverse order, so the PAIR comes first.
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if (Type == MachO::ARM_RELOC_SECTDIFF ||
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Type == MachO::ARM_RELOC_LOCAL_SECTDIFF) {
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MachO::any_relocation_info MRE;
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MRE.r_word0 = ((0 << 0) |
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(MachO::ARM_RELOC_PAIR << 24) |
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(Log2Size << 28) |
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(IsPCRel << 30) |
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MachO::R_SCATTERED);
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MRE.r_word1 = Value2;
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Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
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}
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MachO::any_relocation_info MRE;
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MRE.r_word0 = ((FixupOffset << 0) |
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(Type << 24) |
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(Log2Size << 28) |
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(IsPCRel << 30) |
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MachO::R_SCATTERED);
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MRE.r_word1 = Value;
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Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
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}
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bool ARMMachObjectWriter::requiresExternRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCFragment &Fragment,
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unsigned RelocType,
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const MCSymbol &S,
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uint64_t FixedValue) {
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// Most cases can be identified purely from the symbol.
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if (Writer->doesSymbolRequireExternRelocation(S))
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return true;
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int64_t Value = (int64_t)FixedValue; // The displacement is signed.
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int64_t Range;
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switch (RelocType) {
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default:
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return false;
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case MachO::ARM_RELOC_BR24:
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// An ARM call might be to a Thumb function, in which case the offset may
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// not be encodable in the instruction and we must use an external
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// relocation that explicitly mentions the function. Not a problem if it's
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// to a temporary "Lwhatever" symbol though, and in fact trying to use an
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// external relocation there causes more issues.
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if (!S.isTemporary())
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return true;
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// PC pre-adjustment of 8 for these instructions.
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Value -= 8;
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// ARM BL/BLX has a 25-bit offset.
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||
|
|
Range = 0x1ffffff;
|
||
|
|
break;
|
||
|
|
case MachO::ARM_THUMB_RELOC_BR22:
|
||
|
|
// PC pre-adjustment of 4 for these instructions.
|
||
|
|
Value -= 4;
|
||
|
|
// Thumb BL/BLX has a 24-bit offset.
|
||
|
|
Range = 0xffffff;
|
||
|
|
}
|
||
|
|
// BL/BLX also use external relocations when an internal relocation
|
||
|
|
// would result in the target being out of range. This gives the linker
|
||
|
|
// enough information to generate a branch island.
|
||
|
|
Value += Writer->getSectionAddress(&S.getSection());
|
||
|
|
Value -= Writer->getSectionAddress(Fragment.getParent());
|
||
|
|
// If the resultant value would be out of range for an internal relocation,
|
||
|
|
// use an external instead.
|
||
|
|
if (Value > Range || Value < -(Range + 1))
|
||
|
|
return true;
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
|
||
|
|
void ARMMachObjectWriter::recordRelocation(MachObjectWriter *Writer,
|
||
|
|
MCAssembler &Asm,
|
||
|
|
const MCAsmLayout &Layout,
|
||
|
|
const MCFragment *Fragment,
|
||
|
|
const MCFixup &Fixup, MCValue Target,
|
||
|
|
uint64_t &FixedValue) {
|
||
|
|
unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
|
||
|
|
unsigned Log2Size;
|
||
|
|
unsigned RelocType = MachO::ARM_RELOC_VANILLA;
|
||
|
|
if (!getARMFixupKindMachOInfo(Fixup.getKind(), RelocType, Log2Size)) {
|
||
|
|
// If we failed to get fixup kind info, it's because there's no legal
|
||
|
|
// relocation type for the fixup kind. This happens when it's a fixup that's
|
||
|
|
// expected to always be resolvable at assembly time and not have any
|
||
|
|
// relocations needed.
|
||
|
|
Asm.getContext().reportError(Fixup.getLoc(),
|
||
|
|
"unsupported relocation on symbol");
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
// If this is a difference or a defined symbol plus an offset, then we need a
|
||
|
|
// scattered relocation entry. Differences always require scattered
|
||
|
|
// relocations.
|
||
|
|
if (Target.getSymB()) {
|
||
|
|
if (RelocType == MachO::ARM_RELOC_HALF)
|
||
|
|
return RecordARMScatteredHalfRelocation(Writer, Asm, Layout, Fragment,
|
||
|
|
Fixup, Target, FixedValue);
|
||
|
|
return RecordARMScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup,
|
||
|
|
Target, RelocType, Log2Size,
|
||
|
|
FixedValue);
|
||
|
|
}
|
||
|
|
|
||
|
|
// Get the symbol data, if any.
|
||
|
|
const MCSymbol *A = nullptr;
|
||
|
|
if (Target.getSymA())
|
||
|
|
A = &Target.getSymA()->getSymbol();
|
||
|
|
|
||
|
|
// FIXME: For other platforms, we need to use scattered relocations for
|
||
|
|
// internal relocations with offsets. If this is an internal relocation with
|
||
|
|
// an offset, it also needs a scattered relocation entry.
|
||
|
|
//
|
||
|
|
// Is this right for ARM?
|
||
|
|
uint32_t Offset = Target.getConstant();
|
||
|
|
if (IsPCRel && RelocType == MachO::ARM_RELOC_VANILLA)
|
||
|
|
Offset += 1 << Log2Size;
|
||
|
|
if (Offset && A && !Writer->doesSymbolRequireExternRelocation(*A) &&
|
||
|
|
RelocType != MachO::ARM_RELOC_HALF)
|
||
|
|
return RecordARMScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup,
|
||
|
|
Target, RelocType, Log2Size,
|
||
|
|
FixedValue);
|
||
|
|
|
||
|
|
// See <reloc.h>.
|
||
|
|
uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
|
||
|
|
unsigned Index = 0;
|
||
|
|
unsigned Type = 0;
|
||
|
|
const MCSymbol *RelSymbol = nullptr;
|
||
|
|
|
||
|
|
if (Target.isAbsolute()) { // constant
|
||
|
|
// FIXME!
|
||
|
|
report_fatal_error("FIXME: relocations to absolute targets "
|
||
|
|
"not yet implemented");
|
||
|
|
} else {
|
||
|
|
// Resolve constant variables.
|
||
|
|
if (A->isVariable()) {
|
||
|
|
int64_t Res;
|
||
|
|
if (A->getVariableValue()->evaluateAsAbsolute(
|
||
|
|
Res, Layout, Writer->getSectionAddressMap())) {
|
||
|
|
FixedValue = Res;
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
// Check whether we need an external or internal relocation.
|
||
|
|
if (requiresExternRelocation(Writer, Asm, *Fragment, RelocType, *A,
|
||
|
|
FixedValue)) {
|
||
|
|
RelSymbol = A;
|
||
|
|
|
||
|
|
// For external relocations, make sure to offset the fixup value to
|
||
|
|
// compensate for the addend of the symbol address, if it was
|
||
|
|
// undefined. This occurs with weak definitions, for example.
|
||
|
|
if (!A->isUndefined())
|
||
|
|
FixedValue -= Layout.getSymbolOffset(*A);
|
||
|
|
} else {
|
||
|
|
// The index is the section ordinal (1-based).
|
||
|
|
const MCSection &Sec = A->getSection();
|
||
|
|
Index = Sec.getOrdinal() + 1;
|
||
|
|
FixedValue += Writer->getSectionAddress(&Sec);
|
||
|
|
}
|
||
|
|
if (IsPCRel)
|
||
|
|
FixedValue -= Writer->getSectionAddress(Fragment->getParent());
|
||
|
|
|
||
|
|
// The type is determined by the fixup kind.
|
||
|
|
Type = RelocType;
|
||
|
|
}
|
||
|
|
|
||
|
|
// struct relocation_info (8 bytes)
|
||
|
|
MachO::any_relocation_info MRE;
|
||
|
|
MRE.r_word0 = FixupOffset;
|
||
|
|
MRE.r_word1 =
|
||
|
|
(Index << 0) | (IsPCRel << 24) | (Log2Size << 25) | (Type << 28);
|
||
|
|
|
||
|
|
// Even when it's not a scattered relocation, movw/movt always uses
|
||
|
|
// a PAIR relocation.
|
||
|
|
if (Type == MachO::ARM_RELOC_HALF) {
|
||
|
|
// The entire addend is needed to correctly apply a relocation. One half is
|
||
|
|
// extracted from the instruction itself, the other comes from this
|
||
|
|
// PAIR. I.e. it's correct that we insert the high bits of the addend in the
|
||
|
|
// MOVW case here. relocation entries.
|
||
|
|
uint32_t Value = 0;
|
||
|
|
switch (Fixup.getTargetKind()) {
|
||
|
|
default: break;
|
||
|
|
case ARM::fixup_arm_movw_lo16:
|
||
|
|
case ARM::fixup_t2_movw_lo16:
|
||
|
|
Value = (FixedValue >> 16) & 0xffff;
|
||
|
|
break;
|
||
|
|
case ARM::fixup_arm_movt_hi16:
|
||
|
|
case ARM::fixup_t2_movt_hi16:
|
||
|
|
Value = FixedValue & 0xffff;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
MachO::any_relocation_info MREPair;
|
||
|
|
MREPair.r_word0 = Value;
|
||
|
|
MREPair.r_word1 = ((0xffffff << 0) |
|
||
|
|
(Log2Size << 25) |
|
||
|
|
(MachO::ARM_RELOC_PAIR << 28));
|
||
|
|
|
||
|
|
Writer->addRelocation(nullptr, Fragment->getParent(), MREPair);
|
||
|
|
}
|
||
|
|
|
||
|
|
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
|
||
|
|
}
|
||
|
|
|
||
|
|
std::unique_ptr<MCObjectTargetWriter>
|
||
|
|
llvm::createARMMachObjectWriter(bool Is64Bit, uint32_t CPUType,
|
||
|
|
uint32_t CPUSubtype) {
|
||
|
|
return std::make_unique<ARMMachObjectWriter>(Is64Bit, CPUType, CPUSubtype);
|
||
|
|
}
|