383 lines
17 KiB
C++
383 lines
17 KiB
C++
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// Test target codegen - host bc file has to be created first.
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// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc
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// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 --check-prefix SEQ
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// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - -disable-llvm-optzns -fopenmp-cuda-parallel-target-regions | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 --check-prefix PAR
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// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc
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// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 --check-prefix SEQ
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// RUN: %clang_cc1 -verify -fopenmp -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 --check-prefix SEQ
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// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns -fopenmp-cuda-parallel-target-regions | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 --check-prefix PAR
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// RUN: %clang_cc1 -verify -fopenmp -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns -fopenmp-cuda-parallel-target-regions | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 --check-prefix PAR
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// expected-no-diagnostics
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#ifndef HEADER
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#define HEADER
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template<typename tx>
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tx ftemplate(int n) {
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tx a = 0;
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short aa = 0;
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tx b[10];
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#pragma omp target if(0)
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{
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#pragma omp parallel
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{
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int a = 41;
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}
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a += 1;
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}
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#pragma omp target
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{
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#pragma omp parallel
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{
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int a = 42;
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}
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#pragma omp parallel if(0)
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{
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int a = 43;
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}
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#pragma omp parallel if(1)
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{
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int a = 44;
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}
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a += 1;
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}
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#pragma omp target if(n>40)
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{
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#pragma omp parallel if(n>1000)
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{
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int a = 45;
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#pragma omp barrier
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}
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a += 1;
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aa += 1;
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b[2] += 1;
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}
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#pragma omp target
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{
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#pragma omp parallel
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{
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#pragma omp critical
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++a;
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}
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++a;
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}
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return a;
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}
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int bar(int n){
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int a = 0;
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a += ftemplate<int>(n);
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return a;
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}
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// SEQ: [[MEM_TY:%.+]] = type { [128 x i8] }
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// SEQ-DAG: [[SHARED_GLOBAL_RD:@.+]] = weak addrspace(3) global [[MEM_TY]] undef
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// SEQ-DAG: [[KERNEL_PTR:@.+]] = internal addrspace(3) global i8* undef
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// SEQ-DAG: [[KERNEL_SIZE:@.+]] = internal unnamed_addr constant i{{64|32}} 4
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// SEQ-DAG: [[KERNEL_SHARED:@.+]] = internal unnamed_addr constant i16 1
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// CHECK-NOT: define {{.*}}void {{@__omp_offloading_.+template.+l20}}_worker()
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// CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+template.+l29}}_worker()
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// CHECK-DAG: [[OMP_EXEC_STATUS:%.+]] = alloca i8,
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// CHECK-DAG: [[OMP_WORK_FN:%.+]] = alloca i8*,
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// CHECK: store i8* null, i8** [[OMP_WORK_FN]],
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// CHECK: store i8 0, i8* [[OMP_EXEC_STATUS]],
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// CHECK: br label {{%?}}[[AWAIT_WORK:.+]]
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//
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// CHECK: [[AWAIT_WORK]]
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// CHECK: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0)
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// CHECK: [[KPR:%.+]] = call i1 @__kmpc_kernel_parallel(i8** [[OMP_WORK_FN]])
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// CHECK: [[KPRB:%.+]] = zext i1 [[KPR]] to i8
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// store i8 [[KPRB]], i8* [[OMP_EXEC_STATUS]], align 1
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// CHECK: [[WORK:%.+]] = load i8*, i8** [[OMP_WORK_FN]],
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// CHECK: [[SHOULD_EXIT:%.+]] = icmp eq i8* [[WORK]], null
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// CHECK: br i1 [[SHOULD_EXIT]], label {{%?}}[[EXIT:.+]], label {{%?}}[[SEL_WORKERS:.+]]
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//
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// CHECK: [[SEL_WORKERS]]
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// CHECK: [[ST:%.+]] = load i8, i8* [[OMP_EXEC_STATUS]]
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// CHECK: [[IS_ACTIVE:%.+]] = icmp ne i8 [[ST]], 0
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// CHECK: br i1 [[IS_ACTIVE]], label {{%?}}[[EXEC_PARALLEL:.+]], label {{%?}}[[BAR_PARALLEL:.+]]
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//
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// CHECK: [[EXEC_PARALLEL]]
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// CHECK: [[WF1:%.+]] = load i8*, i8** [[OMP_WORK_FN]],
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// CHECK: [[WM1:%.+]] = icmp eq i8* [[WF1]], bitcast (void (i16, i32)* [[PARALLEL_FN1:@.+]]_wrapper to i8*)
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// CHECK: br i1 [[WM1]], label {{%?}}[[EXEC_PFN1:.+]], label {{%?}}[[CHECK_NEXT1:.+]]
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//
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// CHECK: [[EXEC_PFN1]]
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// CHECK: call void [[PARALLEL_FN1]]_wrapper(
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// CHECK: br label {{%?}}[[TERM_PARALLEL:.+]]
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//
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// CHECK: [[CHECK_NEXT1]]
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// CHECK: [[WF2:%.+]] = load i8*, i8** [[OMP_WORK_FN]],
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// CHECK: [[WM2:%.+]] = icmp eq i8* [[WF2]], bitcast (void (i16, i32)* [[PARALLEL_FN2:@.+]]_wrapper to i8*)
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// CHECK: br i1 [[WM2]], label {{%?}}[[EXEC_PFN2:.+]], label {{%?}}[[CHECK_NEXT2:.+]]
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//
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// CHECK: [[EXEC_PFN2]]
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// CHECK: call void [[PARALLEL_FN2]]_wrapper(
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// CHECK: br label {{%?}}[[TERM_PARALLEL:.+]]
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//
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// CHECK: [[CHECK_NEXT2]]
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// CHECK: br label {{%?}}[[TERM_PARALLEL:.+]]
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//
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// CHECK: [[TERM_PARALLEL]]
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// CHECK: call void @__kmpc_kernel_end_parallel()
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// CHECK: br label {{%?}}[[BAR_PARALLEL]]
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//
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// CHECK: [[BAR_PARALLEL]]
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// CHECK: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0)
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// CHECK: br label {{%?}}[[AWAIT_WORK]]
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//
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// CHECK: [[EXIT]]
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// CHECK: ret void
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// CHECK: define {{.*}}void [[T6:@__omp_offloading_.+template.+l29]](i[[SZ:32|64]]
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// Create local storage for each capture.
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// CHECK: [[LOCAL_A:%.+]] = alloca i[[SZ]],
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// CHECK-DAG: store i[[SZ]] [[ARG_A:%.+]], i[[SZ]]* [[LOCAL_A]]
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// Store captures in the context.
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// CHECK-64-DAG:[[REF_A:%.+]] = bitcast i[[SZ]]* [[LOCAL_A]] to i32*
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//
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// CHECK-DAG: [[TID:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
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// CHECK-DAG: [[NTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
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// CHECK-DAG: [[WS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
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// CHECK-DAG: [[TH_LIMIT:%.+]] = sub nuw i32 [[NTH]], [[WS]]
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// CHECK: [[IS_WORKER:%.+]] = icmp ult i32 [[TID]], [[TH_LIMIT]]
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// CHECK: br i1 [[IS_WORKER]], label {{%?}}[[WORKER:.+]], label {{%?}}[[CHECK_MASTER:.+]]
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//
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// CHECK: [[WORKER]]
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// CHECK: {{call|invoke}} void [[T6]]_worker()
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// CHECK: br label {{%?}}[[EXIT:.+]]
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//
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// CHECK: [[CHECK_MASTER]]
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// CHECK-DAG: [[CMTID:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
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// CHECK-DAG: [[CMNTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
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// CHECK-DAG: [[CMWS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
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// CHECK: [[IS_MASTER:%.+]] = icmp eq i32 [[CMTID]],
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// CHECK: br i1 [[IS_MASTER]], label {{%?}}[[MASTER:.+]], label {{%?}}[[EXIT]]
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//
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// CHECK: [[MASTER]]
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// CHECK-DAG: [[MNTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
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// CHECK-DAG: [[MWS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
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// CHECK: [[MTMP1:%.+]] = sub nuw i32 [[MNTH]], [[MWS]]
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// CHECK: call void @__kmpc_kernel_init(i32 [[MTMP1]]
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// CHECK: call void @__kmpc_kernel_prepare_parallel(i8* bitcast (void (i16, i32)* [[PARALLEL_FN1]]_wrapper to i8*))
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// CHECK: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0)
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// CHECK: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0)
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// CHECK: call void @__kmpc_serialized_parallel(
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// CHECK: {{call|invoke}} void [[PARALLEL_FN3:@.+]](
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// CHECK: call void @__kmpc_end_serialized_parallel(
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// CHECK: call void @__kmpc_kernel_prepare_parallel(i8* bitcast (void (i16, i32)* [[PARALLEL_FN2]]_wrapper to i8*))
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// CHECK: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0)
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// CHECK: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0)
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// CHECK-64-DAG: load i32, i32* [[REF_A]]
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// CHECK-32-DAG: load i32, i32* [[LOCAL_A]]
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// CHECK: br label {{%?}}[[TERMINATE:.+]]
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//
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// CHECK: [[TERMINATE]]
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// CHECK: call void @__kmpc_kernel_deinit(
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// CHECK: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0)
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// CHECK: br label {{%?}}[[EXIT]]
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//
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// CHECK: [[EXIT]]
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// CHECK: ret void
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// CHECK-DAG: define internal void [[PARALLEL_FN1]](
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// CHECK: [[A:%.+]] = alloca i[[SZ:32|64]],
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// CHECK: store i[[SZ]] 42, i[[SZ]]* %a,
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// CHECK: ret void
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// CHECK-DAG: define internal void [[PARALLEL_FN3]](
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// CHECK: [[A:%.+]] = alloca i[[SZ:32|64]],
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// CHECK: store i[[SZ]] 43, i[[SZ]]* %a,
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// CHECK: ret void
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// CHECK-DAG: define internal void [[PARALLEL_FN2]](
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// CHECK: [[A:%.+]] = alloca i[[SZ:32|64]],
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// CHECK: store i[[SZ]] 44, i[[SZ]]* %a,
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// CHECK: ret void
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// CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+template.+l46}}_worker()
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// CHECK-DAG: [[OMP_EXEC_STATUS:%.+]] = alloca i8,
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// CHECK-DAG: [[OMP_WORK_FN:%.+]] = alloca i8*,
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// CHECK: store i8* null, i8** [[OMP_WORK_FN]],
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// CHECK: store i8 0, i8* [[OMP_EXEC_STATUS]],
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// CHECK: br label {{%?}}[[AWAIT_WORK:.+]]
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//
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// CHECK: [[AWAIT_WORK]]
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// CHECK: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0)
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// CHECK: [[KPR:%.+]] = call i1 @__kmpc_kernel_parallel(i8** [[OMP_WORK_FN]])
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// CHECK: [[KPRB:%.+]] = zext i1 [[KPR]] to i8
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// store i8 [[KPRB]], i8* [[OMP_EXEC_STATUS]], align 1
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// CHECK: [[WORK:%.+]] = load i8*, i8** [[OMP_WORK_FN]],
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// CHECK: [[SHOULD_EXIT:%.+]] = icmp eq i8* [[WORK]], null
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// CHECK: br i1 [[SHOULD_EXIT]], label {{%?}}[[EXIT:.+]], label {{%?}}[[SEL_WORKERS:.+]]
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//
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// CHECK: [[SEL_WORKERS]]
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// CHECK: [[ST:%.+]] = load i8, i8* [[OMP_EXEC_STATUS]]
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// CHECK: [[IS_ACTIVE:%.+]] = icmp ne i8 [[ST]], 0
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// CHECK: br i1 [[IS_ACTIVE]], label {{%?}}[[EXEC_PARALLEL:.+]], label {{%?}}[[BAR_PARALLEL:.+]]
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//
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// CHECK: [[EXEC_PARALLEL]]
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// CHECK: [[WF:%.+]] = load i8*, i8** [[OMP_WORK_FN]],
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// CHECK: [[WM:%.+]] = icmp eq i8* [[WF]], bitcast (void (i16, i32)* [[PARALLEL_FN4:@.+]]_wrapper to i8*)
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// CHECK: br i1 [[WM]], label {{%?}}[[EXEC_PFN:.+]], label {{%?}}[[CHECK_NEXT:.+]]
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//
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// CHECK: [[EXEC_PFN]]
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// CHECK: call void [[PARALLEL_FN4]]_wrapper(
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// CHECK: br label {{%?}}[[TERM_PARALLEL:.+]]
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//
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// CHECK: [[CHECK_NEXT]]
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// CHECK: br label {{%?}}[[TERM_PARALLEL:.+]]
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//
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// CHECK: [[TERM_PARALLEL]]
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// CHECK: call void @__kmpc_kernel_end_parallel()
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// CHECK: br label {{%?}}[[BAR_PARALLEL]]
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//
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// CHECK: [[BAR_PARALLEL]]
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// CHECK: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0)
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// CHECK: br label {{%?}}[[AWAIT_WORK]]
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//
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// CHECK: [[EXIT]]
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// CHECK: ret void
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// CHECK: define {{.*}}void [[T6:@__omp_offloading_.+template.+l46]](i[[SZ:32|64]]
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// Create local storage for each capture.
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// CHECK: [[LOCAL_N:%.+]] = alloca i[[SZ]],
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// CHECK: [[LOCAL_A:%.+]] = alloca i[[SZ]],
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// CHECK: [[LOCAL_AA:%.+]] = alloca i[[SZ]],
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// CHECK: [[LOCAL_B:%.+]] = alloca [10 x i32]*
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// CHECK-DAG: store i[[SZ]] [[ARG_N:%.+]], i[[SZ]]* [[LOCAL_N]]
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// CHECK-DAG: store i[[SZ]] [[ARG_A:%.+]], i[[SZ]]* [[LOCAL_A]]
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// CHECK-DAG: store i[[SZ]] [[ARG_AA:%.+]], i[[SZ]]* [[LOCAL_AA]]
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// CHECK-DAG: store [10 x i32]* [[ARG_B:%.+]], [10 x i32]** [[LOCAL_B]]
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// Store captures in the context.
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// CHECK-64-DAG:[[REF_N:%.+]] = bitcast i[[SZ]]* [[LOCAL_N]] to i32*
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// CHECK-64-DAG:[[REF_A:%.+]] = bitcast i[[SZ]]* [[LOCAL_A]] to i32*
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// CHECK-DAG: [[REF_AA:%.+]] = bitcast i[[SZ]]* [[LOCAL_AA]] to i16*
|
||
|
|
// CHECK-DAG: [[REF_B:%.+]] = load [10 x i32]*, [10 x i32]** [[LOCAL_B]],
|
||
|
|
//
|
||
|
|
// CHECK-DAG: [[TID:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
|
||
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|
// CHECK-DAG: [[NTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
|
||
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|
// CHECK-DAG: [[WS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
|
||
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// CHECK-DAG: [[TH_LIMIT:%.+]] = sub nuw i32 [[NTH]], [[WS]]
|
||
|
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// CHECK: [[IS_WORKER:%.+]] = icmp ult i32 [[TID]], [[TH_LIMIT]]
|
||
|
|
// CHECK: br i1 [[IS_WORKER]], label {{%?}}[[WORKER:.+]], label {{%?}}[[CHECK_MASTER:.+]]
|
||
|
|
//
|
||
|
|
// CHECK: [[WORKER]]
|
||
|
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// CHECK: {{call|invoke}} void [[T6]]_worker()
|
||
|
|
// CHECK: br label {{%?}}[[EXIT:.+]]
|
||
|
|
//
|
||
|
|
// CHECK: [[CHECK_MASTER]]
|
||
|
|
// CHECK-DAG: [[CMTID:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
|
||
|
|
// CHECK-DAG: [[CMNTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
|
||
|
|
// CHECK-DAG: [[CMWS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
|
||
|
|
// CHECK: [[IS_MASTER:%.+]] = icmp eq i32 [[CMTID]],
|
||
|
|
// CHECK: br i1 [[IS_MASTER]], label {{%?}}[[MASTER:.+]], label {{%?}}[[EXIT]]
|
||
|
|
//
|
||
|
|
// CHECK: [[MASTER]]
|
||
|
|
// CHECK-DAG: [[MNTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
|
||
|
|
// CHECK-DAG: [[MWS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
|
||
|
|
// CHECK: [[MTMP1:%.+]] = sub nuw i32 [[MNTH]], [[MWS]]
|
||
|
|
// CHECK: call void @__kmpc_kernel_init(i32 [[MTMP1]]
|
||
|
|
// CHECK-64: [[N:%.+]] = load i32, i32* [[REF_N]],
|
||
|
|
// CHECK-32: [[N:%.+]] = load i32, i32* [[LOCAL_N]],
|
||
|
|
// CHECK: [[CMP:%.+]] = icmp sgt i32 [[N]], 1000
|
||
|
|
// CHECK: br i1 [[CMP]], label {{%?}}[[IF_THEN:.+]], label {{%?}}[[IF_ELSE:.+]]
|
||
|
|
//
|
||
|
|
// CHECK: [[IF_THEN]]
|
||
|
|
// CHECK: call void @__kmpc_kernel_prepare_parallel(i8* bitcast (void (i16, i32)* [[PARALLEL_FN4]]_wrapper to i8*))
|
||
|
|
// CHECK: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0)
|
||
|
|
// CHECK: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0)
|
||
|
|
// CHECK: br label {{%?}}[[IF_END:.+]]
|
||
|
|
//
|
||
|
|
// CHECK: [[IF_ELSE]]
|
||
|
|
// CHECK: call void @__kmpc_serialized_parallel(
|
||
|
|
// CHECK: {{call|invoke}} void [[PARALLEL_FN4]](
|
||
|
|
// CHECK: call void @__kmpc_end_serialized_parallel(
|
||
|
|
// br label [[IF_END]]
|
||
|
|
//
|
||
|
|
// CHECK: [[IF_END]]
|
||
|
|
// CHECK-64-DAG: load i32, i32* [[REF_A]]
|
||
|
|
// CHECK-32-DAG: load i32, i32* [[LOCAL_A]]
|
||
|
|
// CHECK-DAG: load i16, i16* [[REF_AA]]
|
||
|
|
// CHECK-DAG: getelementptr inbounds [10 x i32], [10 x i32]* [[REF_B]], i[[SZ]] 0, i[[SZ]] 2
|
||
|
|
//
|
||
|
|
// CHECK: br label {{%?}}[[TERMINATE:.+]]
|
||
|
|
//
|
||
|
|
// CHECK: [[TERMINATE]]
|
||
|
|
// CHECK: call void @__kmpc_kernel_deinit(
|
||
|
|
// CHECK: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0)
|
||
|
|
// CHECK: br label {{%?}}[[EXIT]]
|
||
|
|
//
|
||
|
|
// CHECK: [[EXIT]]
|
||
|
|
// CHECK: ret void
|
||
|
|
|
||
|
|
// CHECK: define internal void [[PARALLEL_FN4]](
|
||
|
|
// CHECK: [[A:%.+]] = alloca i[[SZ:32|64]],
|
||
|
|
// CHECK: store i[[SZ]] 45, i[[SZ]]* %a,
|
||
|
|
// CHECK: call void @__kmpc_barrier(%struct.ident_t* @{{.+}}, i32 %{{.+}})
|
||
|
|
// CHECK: ret void
|
||
|
|
|
||
|
|
// CHECK: declare void @__kmpc_barrier(%struct.ident_t*, i32) #[[#CONVERGENT:]]
|
||
|
|
|
||
|
|
// CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+template.+l58}}_worker()
|
||
|
|
// CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+template.+l58}}(
|
||
|
|
// CHECK-32: [[A_ADDR:%.+]] = alloca i32,
|
||
|
|
// CHECK-64: [[A_ADDR:%.+]] = alloca i64,
|
||
|
|
// CHECK-64: [[CONV:%.+]] = bitcast i64* [[A_ADDR]] to i32*
|
||
|
|
// SEQ: [[IS_SHARED:%.+]] = load i16, i16* [[KERNEL_SHARED]],
|
||
|
|
// SEQ: [[SIZE:%.+]] = load i{{64|32}}, i{{64|32}}* [[KERNEL_SIZE]],
|
||
|
|
// SEQ: call void @__kmpc_get_team_static_memory(i16 0, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([[MEM_TY]], [[MEM_TY]] addrspace(3)* [[SHARED_GLOBAL_RD]], i32 0, i32 0, i32 0) to i8*), i{{64|32}} [[SIZE]], i16 [[IS_SHARED]], i8** addrspacecast (i8* addrspace(3)* [[KERNEL_PTR]] to i8**))
|
||
|
|
// SEQ: [[KERNEL_RD:%.+]] = load i8*, i8* addrspace(3)* [[KERNEL_PTR]],
|
||
|
|
// SEQ: [[STACK:%.+]] = getelementptr inbounds i8, i8* [[KERNEL_RD]], i{{64|32}} 0
|
||
|
|
// PAR: [[STACK:%.+]] = call i8* @__kmpc_data_sharing_push_stack(i{{32|64}} 4, i16 1)
|
||
|
|
// CHECK: [[BC:%.+]] = bitcast i8* [[STACK]] to %struct._globalized_locals_ty*
|
||
|
|
// CHECK-32: [[A:%.+]] = load i32, i32* [[A_ADDR]],
|
||
|
|
// CHECK-64: [[A:%.+]] = load i32, i32* [[CONV]],
|
||
|
|
// CHECK: [[GLOBAL_A_ADDR:%.+]] = getelementptr inbounds %struct._globalized_locals_ty, %struct._globalized_locals_ty* [[BC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0
|
||
|
|
// CHECK: store i32 [[A]], i32* [[GLOBAL_A_ADDR]],
|
||
|
|
// SEQ: [[IS_SHARED:%.+]] = load i16, i16* [[KERNEL_SHARED]],
|
||
|
|
// SEQ: call void @__kmpc_restore_team_static_memory(i16 0, i16 [[IS_SHARED]])
|
||
|
|
// PAR: call void @__kmpc_data_sharing_pop_stack(i8* [[STACK]])
|
||
|
|
|
||
|
|
// CHECK-LABEL: define internal void @{{.+}}(i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* nonnull align {{[0-9]+}} dereferenceable{{.*}})
|
||
|
|
// CHECK: [[CC:%.+]] = alloca i32,
|
||
|
|
// CHECK: [[MASK:%.+]] = call i32 @__kmpc_warp_active_thread_mask(){{$}}
|
||
|
|
// CHECK: [[TID:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
|
||
|
|
// CHECK: [[NUM_THREADS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
|
||
|
|
// CHECK: store i32 0, i32* [[CC]],
|
||
|
|
// CHECK: br label
|
||
|
|
|
||
|
|
// CHECK: [[CC_VAL:%.+]] = load i32, i32* [[CC]],
|
||
|
|
// CHECK: [[RES:%.+]] = icmp slt i32 [[CC_VAL]], [[NUM_THREADS]]
|
||
|
|
// CHECK: br i1 [[RES]], label
|
||
|
|
|
||
|
|
// CHECK: [[CC_VAL:%.+]] = load i32, i32* [[CC]],
|
||
|
|
// CHECK: [[RES:%.+]] = icmp eq i32 [[TID]], [[CC_VAL]]
|
||
|
|
// CHECK: br i1 [[RES]], label
|
||
|
|
|
||
|
|
// CHECK: call void @__kmpc_critical(
|
||
|
|
// CHECK: load i32, i32*
|
||
|
|
// CHECK: add nsw i32
|
||
|
|
// CHECK: store i32
|
||
|
|
// CHECK: call void @__kmpc_end_critical(
|
||
|
|
|
||
|
|
// CHECK: call void @__kmpc_syncwarp(i32 [[MASK]]){{$}}
|
||
|
|
// CHECK: [[NEW_CC_VAL:%.+]] = add nsw i32 [[CC_VAL]], 1
|
||
|
|
// CHECK: store i32 [[NEW_CC_VAL]], i32* [[CC]],
|
||
|
|
// CHECK: br label
|
||
|
|
|
||
|
|
|
||
|
|
// CHECK: declare i32 @__kmpc_warp_active_thread_mask() #[[#CONVERGENT:]]
|
||
|
|
// CHECK: declare void @__kmpc_syncwarp(i32) #[[#CONVERGENT:]]
|
||
|
|
|
||
|
|
// CHECK: attributes #[[#CONVERGENT:]] = {{.*}} convergent {{.*}}
|
||
|
|
|
||
|
|
#endif
|